參數(shù)資料
型號: W25Q64BVSSIG
廠商: WINBOND ELECTRONICS CORP
元件分類: PROM
英文描述: 8M X 8 SPI BUS SERIAL EEPROM, PDSO8
封裝: 0.208 INCH, GREEN, PLASTIC, SOIC-8
文件頁數(shù): 14/61頁
文件大?。?/td> 1726K
代理商: W25Q64BVSSIG
W25Q64BV
Publication Release Date: July 08, 2010
- 21 -
Revision E
11.2.6 Read Status Register-1 (05h) and Read Status Register-2 (35h)
The Read Status Register instructions allow the 8-bit Status Registers to be read. The instruction is
entered by driving /CS low and shifting the instruction code “05h” for Status Register-1 and “35h” for
Status Register-2 into the DI pin on the rising edge of CLK. The status register bits are then shifted out on
the DO pin at the falling edge of CLK with most significant bit (MSB) first as shown in figure 6. The Status
Register bits are shown in figure 3a and 3b and include the BUSY, WEL, BP2-BP0, TB, SEC, SRP0,
SRP1 and QE bits (see description of the Status Register earlier in this datasheet).
The Read Status Register instruction may be used at any time, even while a Program, Erase or Write
Status Register cycle is in progress. This allows the BUSY status bit to be checked to determine when
the cycle is complete and if the device can accept another instruction. The Status Register can be read
continuously, as shown in Figure 6. The instruction is completed by driving /CS high.
Figure 6. Read Status Register Instruction Sequence Diagram
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W25Q64BVSSIGTR 制造商:Winbond Electronics Corp 功能描述:SPIFLASH, 64M-BIT, 4KB UNIFORM
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W25Q64BVZEIP 制造商:WINBOND 制造商全稱:Winbond 功能描述:64M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI
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