
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U17473EJ2V0UD
66
Table 3-7. Special Function Register List (3/4)
Manipulatable Bit Unit
Address
Special Function Register (SFR) Name
Symbol
R/W
1 Bit
8 Bits
16 Bits
After
Reset
FF80H
Serial operation mode register 10
CSIM10
R/W
√
00H
FF81H
Serial clock selection register 10
CSIC10
R/W
√
00H
FF84H
Transmit buffer register 10
SOTB10
R/W
√
00H
FF88H
Serial operation mode register 11
Note 1
CSIM11
R/W
√
00H
FF89H
Serial clock selection register 11
Note 1
CSIC11
R/W
√
00H
FF8CH
Timer clock selection register 51
TCL51
R/W
√
00H
FF99H
Watchdog timer enable register
WDTE
R/W
√
Note 2
1AH/9AH
FF9FH
Clock operation mode select register
OSCCTL
R/W
√
00H
FFA0H
Internal oscillation mode register
RCM
R/W
√
80H
Note 3
FFA1H
Main clock mode register
MCM
R/W
√
00H
FFA2H
Main OSC control register
MOC
R/W
√
80H
FFA3H
Oscillation stabilization time counter status register OSTC
R
√
00H
FFA4H
Oscillation stabilization time select register
OSTS
R/W
√
05H
FFA5H
IIC shift register 0
IIC0
R/W
√
00H
FFA6H
IIC control register 0
IICC0
R/W
√
00H
FFA7H
Slave address register 0
SVA0
R/W
√
00H
FFA8H
IIC clock selection register 0
IICCL0
R/W
√
00H
FFA9H
IIC function expansion register 0
IICX0
R/W
√
00H
FFAAH
IIC status register 0
IICS0
R
√
00H
FFABH
IIC flag register 0
IICF0
R/W
√
00H
FFACH
Reset control flag register
RESF
R
√
00H
Note 4
FFB0H
FFB1H
16-bit timer counter 01
Note 1
TM01
R
√
0000H
FFB2H
FFB3H
16-bit timer capture/compare register 001
Note 1
CR001
R/W
√
0000H
FFB4H
FFB5H
16-bit timer capture/compare register 011
Note 1
CR011
R/W
√
0000H
FFB6H
16-bit timer mode control register 01
Note 1
TMC01
R/W
√
00H
FFB7H
Prescaler mode register 01
Note 1
PRM01
R/W
√
00H
FFB8H
Capture/compare control register 01
Note 1
CRC01
R/W
√
00H
FFB9H
16-bit timer output control register 01
Note 1
TOC01
R/W
√
00H
FFBAH
16-bit timer mode control register 00
TMC00
R/W
√
00H
FFBBH
Prescaler mode register 00
PRM00
R/W
√
00H
FFBCH
Capture/compare control register 00
CRC00
R/W
√
00H
FFBDH
16-bit timer output control register 00
TOC00
R/W
√
00H
Notes 1.
μPD78F0394, 78F0395, 78F0396, 78F0397, and 78F0397D only.
2.
The reset value of WDTE is determined by setting of option byte.
3.
The value of this register is 00H immediately after a reset release but automatically changes to 80H after
internal high-speed oscillator has been stabilized.
4.
The reset value of RESF varies depending on the reset source.