
CHAPTER 5 PORT FUNCTIONS
User’s Manual U17473EJ2V0UD
117
Notes1.
μPD78F0394, 78F0395, 78F0396, 78F0397, and 78F0397D only.
2.
The functions of the ANI0/P20 to ANI7/P27 pins are determined according to the settings of A/D port
configuration register (ADPC), Analog input channel specification register (ADS), and PM2.
Table 5-6. Settings of ANI0/P20 to ANI7/P27 pin function
ADPC Setting
PM2 Setting
ADS Setting
P20/ANI0 to P27/ANI7 Pins
ANI selection
Analog input (target for
conversion)
Input mode
ANI non-selection
Analog input (target for non-
conversion)
ANI selection
Analog input selection
Output mode
ANI non-selection
Setting prohibited
Input mode
Digital input
Digital I/O selection
Output mode
Digital output
3.
When using P121/X1, P122/X2/EXCLK, P123/XT1, or P124/XT2/EXCLKS to connect a resonator for the
main system clock or subsystem clock, or to input an external clock, the X1 oscillation mode, XT1
oscillation mode, or external clock input mode must be set by using the clock operation mode select
register (OSCCTL) (for details, see 5.3 (1) Clock operation mode select register (OSCCTL) and (3)
Setting of operation mode for subsystem clock pin). The reset value of OSCCTL is 00H (all P121 to
P124 are I/O port pins). At this time, settings of PM121 to PM124 and P121 to P124 are not necessary.
Remarks1.
×:
Don’t care
PM
××:
Port mode register
P
××:
Port output latch
2. The X1, X2, P31, and P32 pins of the
μPD78F0397D can be used as on-chip debug mode setting pins
(OCD0A, OCD0B, OCD1A, OCD1B) when the on-chip debug function is used.
For details, see
CHAPTER 28 ON-CHIP DEBUG FUNCTION (
μPD78F0397D ONLY).
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