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CHAPTER 23 RESET FUNCTION
User’s Manual U17473EJ2V0UD
557
Table 23-2. Hardware Statuses After Reset Acknowledgment (1/3)
Hardware
After Reset
Acknowledgment
Note 1
Program counter (PC)
The contents of the
reset vector table
(0000H, 0001H) are
set.
Stack pointer (SP)
Undefined
Program status word (PSW)
02H
Data memory
Undefined
Note 2
RAM
General-purpose registers
Undefined
Note 2
Port registers (P0 to P3, P7, P12, P13) (output latches)
00H
Port mode registers (PM0 to PM3, PM6, PM7, PM12, PM14)
FFH
Pull-up resistor option registers (PU0, PU1, PU3, PU7, PU12)
00H
Internal expansion RAM size switching register (IXS)
0CH
Note 3
Internal memory size switching register (IMS)
CFH
Note 3
Memory bank select register (BANK)
00H
Clock operation mode select register (OSCCTL)
00H
Processor clock control register (PCC)
01H
Internal oscillation mode register (RCM)
80H
Main OSC control register (MOC)
80H
Main clock mode register (MCM)
00H
Oscillation stabilization time select register (OSTS)
05H
Oscillation stabilization time counter status register (OSTC)
00H
Timer counters 00, 01 (TM00, TM01)
0000H
Capture/compare registers 000, 010, 001, 011 (CR000, CR010, CR001, CR011)
0000H
Mode control registers 00, 01 (TMC00, TMC01)
00H
Prescaler mode registers 00, 01 (PRM00, PRM01)
00H
Capture/compare control registers 00, 01 (CRC00, CRC01)
00H
16-bit timer/event
counters 00, 01
Note 4
Timer output control registers 00, 01 (TOC00, TOC01)
00H
Notes 1.
During reset signal generation or oscillation stabilization time wait, only the PC contents among the
hardware statuses become undefined. All other hardware statuses remain unchanged after reset.
2.
When a reset is executed in the standby mode, the pre-reset status is held even after reset.
3.
The initial values of the internal memory size switching register (IMS) and internal expansion RAM size
switching register (IXS) after a reset release are constant (IMS = CFH, IXS = 0CH) in all the 78K0/LG2
products, regardless of the internal memory capacity. Therefore, after a reset is released, be sure to set
the following values for each product.
Flash Memory Version
(78K0/LG2)
IMS
IXS
μPD78F0393
C8H
0CH
μPD78F0394
CCH
0AH
μPD78F0395
CFH
08H
μPD78F0396
CCH
04H
μPD78F0397, 78F0397D Note5
CCH
00H
4.
16-bit timer/event counter 01 is available only in the
μPD78F0394, 78F0395, 78F0396, 78F0397, and
78F0397D.
5.
The ROM and RAM capacities of the products with the on-chip debug function can be debugged
according to the debug target products. Set IMS and IXS according to the debug target products.
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