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型號(hào)：	UPD78F0394GC-8EA-A
廠商：	Renesas Electronics America
文件頁(yè)數(shù)：	525/682頁(yè)
文件大?。?/td>	0K
描述：	MCU 8BIT 48KB FLASH
標(biāo)準(zhǔn)包裝：	400
系列：	78K0/Lx2
核心處理器：	78K/0
芯體尺寸：	8-位
速度：	20MHz
連通性：	3 線 SIO，I²C，LIN，UART/USART
外圍設(shè)備：	LCD，LVD，POR，PWM，WDT
輸入/輸出數(shù)：	40
程序存儲(chǔ)器容量：	48KB（48K x 8）
程序存儲(chǔ)器類型：	閃存
RAM 容量：	2K x 8
電壓 - 電源 (Vcc/Vdd)：	1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器：	A/D 8x10b
振蕩器型：	內(nèi)部
工作溫度：	-40°C ~ 85°C
封裝/外殼：	100-LQFP
包裝：	托盤(pán)

CHAPTER 25 LOW-VOLTAGE DETECTOR

User’s Manual U17473EJ2V0UD

Figure 25-2. Format of Low-Voltage Detection Register (LVIM)

Address: FFBEH

After reset: 00H

R/WNote 1

Notes 2, 3

Enables low-voltage detection operation

Disables operation

Enables operation

Voltage detection selection

Detects level of supply voltage (VDD)

Detects level of input voltage from external input pin (EXLVI)

Low-voltage detection operation mode (interrupt/reset) selection

LVISEL = 0: Generates an internal interrupt signal when the supply voltage (VDD) drops

lower than the detection voltage (VLVI) (VDD < VLVI) or when VDD becomes

VLVI or higher (VDD

LVISEL = 1: Generates an interrupt signal when the input voltage from an external

input pin (EXLVI) drops lower than the detection voltage (VEXLVI) (EXLVI <

VEXLVI) or when EXLVI becomes VEXLVI or higher (EXLVI

LVISEL = 0: Generates an internal reset signal when the supply voltage (VDD) <

detection voltage (VLVI) and releases the reset signal when VDD

LVISEL = 1: Generates an internal reset signal when the input voltage from an

external input pin (EXLVI) < detection voltage (VEXLVI) and releases the

reset signal when EXLVI

Low-voltage detection flag

LVISEL = 0: Supply voltage (VDD) ≥ detection voltage (VLVI), or when operation is

LVISEL = 1: Input voltage from external input pin (EXLVI) ≥ detection voltage (VEXLVI),

or when operation is disabled

LVISEL = 0: Supply voltage (VDD) < detection voltage (VLVI)

LVISEL = 1: Input voltage from external input pin (EXLVI) < detection voltage (VEXLVI)

Notes 1.

Bit 0 is read-only.

LVION, LVIMD, and LVISEL are cleared to 0 in the case of a reset other than an LVI reset.

These are not cleared to 0 in the case of an LVI reset.

When LVION is set to 1, operation of the comparator in the LVI circuit is started.

software to wait for an operation stabilization time (10

μs (MAX.)) when LVION is set to 1 until

the voltage is confirmed at LVIF.

The value of LVIF is output as the interrupt request signal INTLVI when LVION = 1 and

Cautions 1. To stop LVI, follow either of the procedures below.

When using 8-bit memory manipulation instruction: Write 00H to LVIM.

When using 1-bit memory manipulation instruction: Clear LVION to 0.

2. Input voltage from external input pin (EXLVI) must be EXLVI < VDD.

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相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
UPD78F0395GC(R)-8EA-A	制造商:Renesas Electronics Corporation 功能描述:
UPD78F0395GC(T)-8EA	制造商:Renesas Electronics Corporation 功能描述:
UPD78F0395GC(T)-8EA-A	制造商:Renesas Electronics Corporation 功能描述:
UPD78F0397DGC(T)-8EA	制造商:Renesas Electronics Corporation 功能描述:
UPD78F0397DGC(T)-8EA-A	制造商:Renesas Electronics Corporation 功能描述:

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