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TMC2376
PRODUCT SPECIFICATION
33
P
Applications Information
Design Example–PC
Figure 27 is a reference schematic for the TMC2376. RGB
video signals and the vertical and horizontal sync signals are
intercepted by tapping connections to the VGA connector.
Typically, control of the TMC2376 will be through the serial
interface. S-video and CVBS outputs are fed to connector
that should be located at the board edge. Power is derived
from 5 volt analog, 3.3 digital 5 volt digital supplies. It is
recommended that the analog supply be clean of noise.
A 17.73 MHz PAL oscillator is shown with connection to the
CKNTSC input to provide the necessary internal clock.
For NTSC, this oscillator can be replaced with a 14.318
MHz oscillator. Systems needing both NTSC and PAL
should be set up with separate PAL and NTSC oscillators
connected to the CKIN_N and CKIN_P pins; or crystals with
appropriate capacitors connected between the CKIN_N and
CKOUT_N pins and CKIN_P and CKOUT_P pins.
Input impedance of the A/D converters exceeds 500K and
will not load VGA RGB lines. Shunt 47 pF capacitors and
274
series resistors form a low pass filter with 12 MHz cut-
off. Filtering the incoming video has two functions:
equalizing the intensities of vertical lines
eliminating sampling noise.
Outgoing video is filtered by low pass Bessel filters with 10
MHz cutoff. An optional low pass filter has two functions:
removal of steps from the CVBS output
limiting the bandwidth of outgoing video.
For higher definition of horizontal frequencies, a sinx/x cor-
rection filter should be incorporated to compensate for 2 dB
sampling loss of the D/A converters. Schottky diode clamps
protect the TMC2376 from high voltage transients.
Figure 25. Video Filter Response
Figure 26. Video Filter Delay
V
TIN
is derived from the bias voltage across R
REF
which is
established by the internal reference voltage available at
V
REF
. R
REF
is split into two resistors with series resistance to
set the R
REF
current and ratio to establish the V
TIN
voltage.
Design Example - TV
By interfacing the TMC2376 circuit shown in Figure 27 with
the microcontroller circuit shown in Figure 28 is a TV refer-
ence design TV reference design can be created. With this
design, many PC VGA or MAC formats can be automatically
detected by firmware resident in the 8051 microcontroller to
enable the TMC2376 to be programmed with the correct reg-
ister values for correct scaling and centering.
Only the RGB output is needed to directly drive the CRT via
the TV video amplifiers. Separate composite sync is fed to
the TV synchronization circuits that drive the horizontal and
vertical deflection circuits. The optional 10 MHz low pass
filters at the output are not required.
10.00
0.00
-10.00
-20.00
-30.00
-40.00
1
10
Frequency (MHz)
G
100
50.00
40.00
30.00
20.00
10.00
0.00
1
10
Frequency (MHz)
D
100