參數(shù)資料
型號： TMC2376
廠商： Fairchild Semiconductor Corporation
英文描述： PC-to-TV Video Standards Converter(PC到TV視頻標(biāo)準(zhǔn)變換器)
中文描述： PC到電視視頻標(biāo)準(zhǔn)轉(zhuǎn)換器（電腦到電視視頻標(biāo)準(zhǔn)變換器）
文件頁數(shù)： 14/48頁
文件大?。?/td> 233K
代理商： TMC2376
TMC2376
PRODUCT SPECIFICATION
14
P
Command Register Low (10)
7
CBPF
Command Register High(11)
7
0
Status Register (12)
7
REVID3
6
5
4
3
2
1
0
LUMNTCH
UVALT
FRZ
RGBGAIN
ZOOM
PAL/NTSC
RESET
6
0
5
0
4
0
3
0
2
0
1
0
DACFMT1
DACFMT0
Reg
11
Bit#
1-0
Bit Name
DACFMT1-0
Description
DAC Output Format.
Selects between:
0 0 Y/C and CVBS
0 1 RGB
1 0 YUV
1 1 YUV
0: Bypass chroma bandpass filter
1: Insert chroma bandpass filter
0: Bypass luminance notch filter
1: Insert luminance notch filter
0: Cosite U and V samples
1: Alternate U and V samples
0: Continuous update
1: Freeze frame
0: 1X input gain
1: 1.43 input gain
0: Zoom off
1: Zoom on
0: select NTSC video output timing
1: select PAL video output timing
0: reset video pipeline (control registers are not affected)
1: run
10
7
CBPF
10
6
LUMNTCH
10
5
UVALT
10
4
FRZ
10
3
RGBGAIN
10
2
ZOOM
10
1
PAL/NTSC
10
0
RESET
6
5
4
3
2
0
1
0
0
REVID2
REVID1
REVID0
STRTERR
PLL_LOCK
Reg
12
12
Bit#
7-4
3
Bit Name
REVID
STRTERR
Description
Chip revision identification.
Starts at 0
Output Video Start Position.
Flag indicates if active
video has been programmed to overlay output horizontal
sync.
0: Start position within limits
1: Start position error
Not used
SCLK PLL status.
0: unlocked
1: locked
12
12
2-1
0
-
PLL_LOCK
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