參數(shù)資料
型號(hào): TDA8754HL/27/C1
廠商: NXP SEMICONDUCTORS
元件分類: ADC
英文描述: 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP144
封裝: 20 X 20 MM, 1.40 MM HEIGHT, LEAD FREE, PLASTIC, MS-026, SOT486-1, LQFP-144
文件頁數(shù): 32/57頁
文件大?。?/td> 259K
代理商: TDA8754HL/27/C1
TDA8754_7
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 — 3 May 2007
38 of 57
NXP Semiconductors
TDA8754
Triple 8-bit video ADC up to 270 Msample/s
9.22 Read register
9.23 Version register
9.24 Sign detection register
The sign bits are set at logic 0 when the input is a mostly LOW input signal.
1
STBY
enables the RGB block to be forced into the Standby mode, except activity detection,
I2C-bus registers. In the Standby mode, all outputs are in high-impedance state, except
pin HPDO which is still active. If the IC is in the Power-down mode, this bit has no effect
0 = IC active
1 = Standby mode
0
DVIRGB
this bit must be set to logic 0 for proper operation
Table 62.
PWRMGT - power management register (address 1Eh) bit description …continued
Bit
Symbol
Description
Table 63.
READADDR - read register (address 1Fh) bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
------
ADDR1
ADDR0
Reset
XXXXXX
0
Access
WWWWWWWW
Table 64.
READADDR - read register (address 1Fh) bit description
Bit
Symbol
Description
7 to 2
-
not used
1 to 0
ADDR[1:0]
register address to be read
00 = read register 0
01 = read register 1
10 = read register 2
11 = read register 3
Table 65.
VERSION - version register (read register 0) bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
----
VER3
VER2
VER1
VER0
Reset
XXXX
0000
Access
RRRRRRRR
Table 66.
VERSION - version register (read register 0) bit description
Bit
Symbol
Description
7 to 4
-
not used
3 to 0
VER[3:0]
version of the IC
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