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| 型號： | TDA8754HL/27/C1 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | ADC |
| 英文描述： | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP144 |
| 封裝： | 20 X 20 MM, 1.40 MM HEIGHT, LEAD FREE, PLASTIC, MS-026, SOT486-1, LQFP-144 |
| 文件頁數(shù)： | 19/57頁 |
| 文件大小： | 259K |
| 代理商： | TDA8754HL/27/C1 |
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TDA8754_7
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 — 3 May 2007
26 of 57
NXP Semiconductors
TDA8754
Triple 8-bit video ADC up to 270 Msample/s
9.5 Fine registers (R, G and B)
Fine gain control is done with 3 bits allowing 8 intermediate values between two values of
consecutive coarse gain.
70
1
0
1
0
0.698
1.432
::
:
95
1
0
1
0.500
2.000
Table 22.
Coarse register …continued
Value
CR6 CR5 CR4 CR3 CR2 CR1 CR0 Vi (full-scale)
Gain ADC
CG6 CG5 CG4 CG3 CG2 CG1 CG0
CB6 CB5 CB4 CB3 CB2 CB1 CB0
Table 23.
Fine gain registers (02h, 05h, 08h) bit allocation with reset
Register
7
6
5
4
3
2
1
0
FINER (02h)
-
----
FR2
FR1
FR0
FINEG (05h)
-
----
FG2
FG1
FG0
FINEB (08h)
-
----
FB2
FB1
FB0
Reset
XXXXX
0
Table 24.
Fine gain registers (02h, 05h, 08h) bit description
Bit
Symbol
Description
FINER (address: 02h)
7 to 3
-
not used
2 to 0
FR[2:0]
ne gain of the AGC for R channel
FINEG (address: 05h)
7 to 3
-
not used
2 to 0
FG[2:0]
ne gain of the AGC for G channel
FINEB (address: 08h)
7 to 3
-
not used
2 to 0
FB[2:0]
ne gain of the AGC for B channel
Table 25.
Fine gain control bits (example for coarse register value 32)
Value
FR2
FR1
FR0
Fine steps of
gain ADC
FG2
FG1
FG0
FB2
FB1
FB0
0000
1.000
1001
1.001
2010
1.002
3011
1.003
4000
1.004
5001
1.005
6010
1.006
7111
1.007
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