參數(shù)資料
型號(hào): TDA8754HL/27/C1
廠商: NXP SEMICONDUCTORS
元件分類: ADC
英文描述: 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP144
封裝: 20 X 20 MM, 1.40 MM HEIGHT, LEAD FREE, PLASTIC, MS-026, SOT486-1, LQFP-144
文件頁數(shù): 13/57頁
文件大?。?/td> 259K
代理商: TDA8754HL/27/C1
TDA8754_7
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 — 3 May 2007
20 of 57
NXP Semiconductors
TDA8754
Triple 8-bit video ADC up to 270 Msample/s
9.1.2.1
Read register
Table 11.
Write format bit description
Bit
Symbol
Description
Byte 1
7 to 1
A[6:0]
Device address; the TDA8754 address is 1001 10X; bit A0 relates
with the voltage level on pin A0
0R/W
Write command bit; if R/W = 0, then write action
Byte 2
7 to 6
-
not used
5
MODE
Mode selection bit; if MODE = 1, then all registers can be written one
after the other
4 to 0
SA[4:0]
Register subaddress; initial condition is XX11 to 1111
Byte (2 + n)
7 to 0
D[7:0]
Data n; this value is written in register 00h + n
Table 12.
I2C-bus sequence for reading one register
SDA line
Description
S
master starts with a start condition
Byte 1
master transmits device address (7 bits) plus write command bit (R/W=0)
A
slave generates an acknowledge
Byte 2
master transmits programming mode and register subaddress to read from
A
slave generates an acknowledge
Byte 3
master transmits read register subaddress
A
slave generates an acknowledge
Byte 4
master transmits device address (7 bits) plus read command bit (R/W=1)
A
slave generates an acknowledge
Byte 5
slave transmits data to master
A
master generates an not-acknowledge after reading the data byte
P
master generates a stop condition
Table 13.
Byte format for reading register
Bits
7
6
5
4
3
2
1
0
Byte 1
device address
R/W
A6
A5
A4
A3
A2
A1
A0
-
100110
X
0
Byte 2
programming mode
register subaddress
-
MODE
SA4
SA3
SA2
SA1
SA0
X
011111
Byte 3
read subaddress
------
RA1
RA0
000000
-
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