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參數(shù)資料
| 型號： | TCM4400EGGM |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | GSM/DCS BASEBAND AND VOICE A/D AND D/A RF INTERFACE CIRCUIT |
| 中文描述： | 的GSM / DCS的基帶和語音的A / D和D / A射頻接口電路 |
| 文件頁數(shù)： | 7/64頁 |
| 文件大?。?/td> | 888K |
| 代理商： | TCM4400EGGM |
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TCM4400E
GSM/DCS BASEBAND AND VOICE A/D
AND D/A RF INTERFACE CIRCUIT
SLWS082A – JULY 1999 – REVISED MARCH 2000
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, AV
DD
, DV
DD
(see Note 1)
Maximum voltage on any input, V
I
max
Storage temperature, T
stg
Maximum junction temperature, T
J
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Voltage measurements with respect to GND.
–0.3 to 6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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V
DD
+0.3 V / V
SS
–0.3 V
–65
°
C to 150
°
C
150
°
C
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage range (AVDD, DVDD)
Operating temperature range
2.7
3.0
3.3
Vdc
°
C
Vdc
–25
85
Digital I/O voltage with respect to DVSS
Analog I/O voltage with respect to AVSS
Difference between any AVDD or DVDD
–0.3
DVDD + 0.3
AVDD + 0.3
0.3
–0.3
V
V
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
digital inputs and outputs
PARAMETER
MIN
TYP
MAX
UNIT
μ
A
mA
μ
A
mA
Low-level output current with digital pad lower than 0.1 V (CMOS)
0
40
Low-level output current with digital pad lower than 0.4 V (TTL)
0
1
High-level output current with digital pad higher than VDD–0.1 V (CMOS)
High-level output current with digital pad higher than VDD–0.4 V (TTL)
Minimum high-level input voltage, VIH
Maximum low level input voltage, VIL
Output current on high impedance state outputs
–40
0
–1
0
Vdd–0.3
V
Vss+0.3
V
μ
A
μ
A
μ
A
μ
A
–15
15
Input current (any input) when input high
–1
Input current (standard inputs) when input low
1
Input current (inputs with pullup TMS, TDI ,TEST1 ,TEST2) when input low
15
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