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| 型號： | T7633 |
| 廠商： | Lineage Power |
| 英文描述： | Dual T1/E1 3.3 V Short-Haul Terminator(雙T1/E1 3.3V短通信距離終端器) |
| 中文描述： | 雙T1/E1的3.3伏短途終結(jié)者（雙T1/E1的3.3短通信距離終端器） |
| 文件頁數(shù)： | 38/248頁 |
| 文件大?。?/td> | 1459K |
| 代理商： | T7633 |
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Advance Data Sheet
T7633 Dual T1/E1 3.3 V Short-Haul Terminator
May 1998
28
Lucent Technologies Inc.
Line Interface Unit: Receive
(continued)
Receive Line Interface Configuration Modes
(continued)
Receive Line Interface Unit (RLIU) Alarms
Analog Loss of Signal (ALOS) Alarm
. An analog signal detector monitors the receive signal amplitude and
reports its status in the analog loss of signal alarm bit ALOS (register LIU_REG0, bit 0). Analog loss of signal is
indicated (ALOS = 1) if the amplitude at the RRING and RTIP inputs drops below a voltage approximately 18 dB
below the nominal signal amplitude. The ALOS alarm condition will clear when the receive signal amplitude returns
to a level greater than 14 dB below normal. The ALOS alarm status bit will latch the alarm and remain set until
being cleared by a read (clear on read). Upon the transition from ALOS = 0 to ALOS = 1, a microprocessor inter-
rupt will be generated if the ALOS interrupt enable bit ALOSIE (register LIU_REG1, bit 0) is set. The reset default is
ALOSIE = 0.
The ALOS circuitry provides 4 dB of hysteresis to prevent alarm chattering. The time required to detect ALOS is
selectable. When ALTIMER = 0 (register LIU_REG4, bit 0), ALOS is declared between 1 ms and 2.6 ms after losing
signal as required by I.431(3/93) and ETS-300-233 (5/94). If ALTIMER = 1, ALOS is declared between 10-bit and
255-bit symbol periods after losing signal as required by G.775 (11/95). The timing is derived from the SYSCK
clock. The detection time is independent of signal amplitude before the loss condition occurs. Normally, ALTIMER =
1 would be used only in E1 mode since no T1/DS1 standards require this mode. In T1/DS1 mode, this bit should
normally be zero. The reset default is ALTIMER = 0.
The behavior of the receiver RLIU outputs under ALOS conditions is dependent on the loss shutdown (LOSSD)
control bit (register LIU_REG3, bit 4) in conjunction with the receive alarm indication select (RCVAIS) control bit
(register LIU_REG4, bit 1) as described in the Loss Shutdown (LOSSD) and Receiver AIS (RCVAIS) section on
page 29.
Digital Loss of Signal (DLOS) Alarm
. A digital loss of signal (DLOS) detector guarantees the received signal
quality as defined in the appropriate ANSI, Bellcore, and ITU standards. The digital loss of signal alarm is reported
in the RLIU alarm status register (register LIU_REG0, bit 1). For DS1 operation, digital loss of signal (DLOS = 1) is
indicated if 100 or more consecutive 0s occur in the receive data stream. The DLOS condition is deactivated when
the average ones density of at least 12.5% is received in 100 contiguous pulse positions. The DLOS alarm status
bit will latch the alarm and remain set until being cleared by a read (clear on read). The LOSSTD control bit (regis-
ter LIU_REG2, bit 2) selects the conformance protocols for the DLOS alarm indication per Table 2. Setting
LOSSTD = 1 adds an additional constraint that there are less than 15 consecutive zeros in the DS1 data stream
before DLOS is deactivated. The reset default is LOSSTD = 0.
For E1 operation, DLOS is indicated when 255 or more consecutive 0s occur in the receive data stream. The DLOS
indication is deactivated when the average ones density of at least 12.5% is received in 255 contiguous pulse posi-
tions. LOSSTD has no effect in E1 mode.
Upon the transition from DLOS = 0 to DLOS = 1, a microprocessor interrupt will be generated if the DLOS interrupt
enable bit DLOSIE (register LIU_REG1, bit 1) is set. The reset default is DLOSIE = 0.
The DLOS alarm may occur when FLLOOP is activated (see Line Interface Unit: Loopbacks section on page 44)
due to the abrupt change in signal level at the receiver input. Setting the FLLOOP alarm prevention PFLALM = 1
(register LIU_REG 4, bit 2) prevents the DLOS alarm from occurring when FLLOOP is activated by quickly reset-
ting the receiver’s internal peak detector. It will not prevent the DLOS alarm during the FLLOOP period but only
avoids the alarm created by the signal amplitude transient. The reset default is PFLALM = 0.
Table 2. Digital Loss of Signal Standard Select
LOSSTD
0
1
DS1 Mode
CEPT Mode
ITU-T G.775
ITU-T G.775
T1M1.3/93-005, ITU-T G.775
TR-TSY-000009
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