參數(shù)資料
型號(hào)： SPAK302FC25C
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 4 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP132
封裝： 0.950 X 0.950 INCH, 0.025 INCH PITCH, PLASTIC, QFP-132
文件頁數(shù)： 118/128頁
文件大?。?/td> 641K
代理商： SPAK302FC25C
Table of Contents
Paragraph
Title
Page
Number
x
MC68EN302 USER’S MANUAL
MOTOROLA
Section 6
Applications
6.1
Bringing the MC68EN302 Out of Reset ...................................................6-1
6.2
Moving a QUICC Ethernet Driver to a 68EN302 Ethernet Driver ............6-3
6.2.1
C_PRES, C_MASK:.................................................................................6-4
6.2.2
CRCEC: ...................................................................................................6-4
6.2.3
ALEC:.......................................................................................................6-4
6.2.4
DISFC: .....................................................................................................6-4
6.2.5
PADS: ......................................................................................................6-4
6.2.6
RET_LIM:.................................................................................................6-4
6.2.7
RET_Cnt: .................................................................................................6-5
6.2.8
MFLR: ......................................................................................................6-5
6.2.9
MINFLR:...................................................................................................6-5
6.2.10
MAXD1, MAXD2: .....................................................................................6-5
6.2.11
MAX_b: ....................................................................................................6-5
6.2.12
GADDR1-4 / PADDR_HML / IADDR1-4: .................................................6-5
6.2.13
P_PER: ....................................................................................................6-5
6.2.14
RFBD_ptr/TFBD_ptr/TLBD_ptr: ...............................................................6-5
6.2.15
TX_len:.....................................................................................................6-5
6.2.16
BOFF_CNT: .............................................................................................6-6
6.2.17
TADDR_H/M/L: ........................................................................................6-6
6.2.18
GSMR (QUICC Section 7.10.2) ...............................................................6-6
Section 7
IEEE 1149.1 (JTAG) Test Access Port
7.1
Overview ..................................................................................................7-1
7.2
TAP Controller .........................................................................................7-2
7.3
Boundary Scan Register ..........................................................................7-3
7.4
Instruction Register ................................................................................7-12
7.4.1
EXTEST .................................................................................................7-13
7.4.2
SAMPLE/PRELOAD ..............................................................................7-13
7.4.3
BYPASS.................................................................................................7-13
7.4.4
CLAMP...................................................................................................7-14
7.4.5
HI-Z ........................................................................................................7-14
7.5
MC68EN302 Restrictions.......................................................................7-14
7.6
Non-Scan Chain Operation....................................................................7-14
Section 8
MC68EN302 Electrical Characteristics
8.1
Power Dissipation ....................................................................................8-1
8.2
Changes to Existing MC68302 Timing Specs..........................................8-1
8.3
DRAM Interface Timing............................................................................8-2
8.4
Ethernet Timing........................................................................................8-5
8.5
JTAG Interface Timing .............................................................................8-7
8.6
OE, WEL, WEH Timing............................................................................8-9
8.6.1
OE Timing ................................................................................................8-9
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