參數(shù)資料
型號: SC4000
廠商: NXP SEMICONDUCTORS
元件分類: 路由/交換
英文描述: Pressure Transducer, Series 19 mm, Compensated, Pressure Range: 0 psi to 200 psi, Vacuum Gage, 1/8-27 NPT, 10 Vdc excitation
中文描述: TELECOM, DIGITAL TIME SWITCH, PQFP100
封裝: TQFP-100
文件頁數(shù): 22/52頁
文件大?。?/td> 179K
代理商: SC4000
2000 Sep 07
22
Philips Semiconductors
Preliminary specification
Universal Timeslot Interchange
SC4000
Register Access Schemes
The SC4000 features two address access
schemes. One is an indirect access
scheme (C_11 = 0) to reduce the num-
ber of pins required for the micropro-
cessor address bus interface from nine to
two (A_[1:0]), as shown in Figure 5. The
other is a combination of both indirect
and direct parallel access schemes (C_11
= 1). Using the combination requires
that all nine microprocessor address
pins (A_[8:0]) be used, as shown in
Figure 6.
Figure 5. Using Two Pins A_[1:0] for Address Bus Interface Scheme (C_11 = 0)
Figure 6. Using Nine Pins A_[8:0] for Address Bus Interface Scheme (C_11 = 1)
Microprocessor
Address
Data
03h
High Byte Data Register (HBDR)
02h
Low Byte Data Register (LBDR)
01h
Internal Address Register (IAR)
00h
Command/Status Register (CSR)
FFh - E0h
Source Parallel Access (31 - 0)
DFh - C0h
Destination Parallel Access (31 - 0)
BFh - A0h
Source Routing Memory (31 - 0)
9Fh - 80h
Destination Routing Memory (31 - 0)
7Fh - 0Dh
Reserved
0Ch - 00h
Configuration Register (12 - 0)
Note:
See bit 5 and 4 of CSR to select
the bank of channels
A_[1:0]
D_[7:0]
FF - E0
Source Parallel Access (31 - 0)
DF - C0
Destination Parallel Access (31 - 0)
BF - A0
Source Routing Memory (31 - 0)
9F - 80
Destination Routing Memory (31 - 0)
7F - 0D
Reserved
0C - 00
Configuration Register (12 - 0)
Address
Data
1FFh - 180h
Source Parallel Access (127 - 0)
17Fh - 100h
Destination Parallel Access (127 - 0)
FFh - 04h
Reserved
03h
High Byte Data Register (HBDR)
02h
Low Byte Data Register (LBDR)
01h
Internal Address Register (IAR)
00h
Command/Status Register (CSR)
Note:
See bit 5 and 4 of CSR to select
the bank of channels
Microprocessor
A_[8:0]
D_[7:0]
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