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參數(shù)資料
| 型號： | SC4000 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 路由/交換 |
| 英文描述： | Pressure Transducer, Series 19 mm, Compensated, Pressure Range: 0 psi to 200 psi, Vacuum Gage, 1/8-27 NPT, 10 Vdc excitation |
| 中文描述： | TELECOM, DIGITAL TIME SWITCH, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 10/52頁 |
| 文件大?。?/td> | 179K |
| 代理商： | SC4000 |
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2000 Sep 07
10
Philips Semiconductors
Preliminary specification
Universal Timeslot Interchange
SC4000
PIN DESCRIPTION
Pin Name
Input/Output
Pin Number
Pin Description
D_[7:0]
I/O
44,43,42,40,
39,38,36,35
(TTL Bi-directional) Mcroprocessor Data Bus. These bi-directional, tri-state lines allow the mcroprocessor to
access SC4000 internal registers as well as the source/destination routing memory and parallel access registers.
A_[8:0]
I
34,32,31,30,
28,27,26,25,24
(TTL Input) Mcroprocessor Address Bus. These inputs select the internal registers used by a read or write opera-
tion. Normally these inputs are connected to Mcroprocessor address lines A[8:0].
ALE
I
22
(TTL Input) Address Latch Enable. This input pin is tied to high in non-multiplexed mode. Otherwise, in multi-
plexed mode, the Mcroprocessor Address Bus is latched internally on the falling edge of this signal.
CS_1_N
I
17
(TTL Input) Chip Select 1. Reserved for future internal HDLC controller. If unused, this pin should be connected to
high.
CS_0_N
I
16
(TTL Input) Chip Select 0. This active low signal selects the SC4000
for a mcroprocessor read or write operation.
I_N
or
M
I
12
(TTL Input) Mcroprocessor Bus Interface Mode Select.
When this input is low, Intel Bus Mode (I_N) is selected.
When this input is high, Motorola Bus (M) Mode is selected.
RD_N
or
STRB_N
I
19
(TTL Input) In Intel Bus Mode (RD_N), this active low input operates with CS_0_N to configure the data bus lines
D_[7:0] as output. In Motorola Bus Mode (STRB_N), this active low input operates with CS_0_N to enable a read
or write operation.
WR_N
or
R/W_N
I
20
(TTL Input) In Intel Bus Mode (WR_N), when CS_0_N is active, the rising edge of WR_N is used to latch an inter-
nal data register with data provided via the data bus lines D_[7:0]. In Motorola Bus Mode (R/W_N), this R/W_N
input is used to distinguish between read or write during a mcroprocessor access.
DACK_N
I
21
(TTL Input, Pull up) DMA Acknowledge Reserved for future internal HDLC controller. If unused, this pin should be
left unconnected
RESET
I
96
(TTL Input) Reset. This active high signal initializes the mcroprocessor interface, configuration, routing and paral-
lel access registers.
X_IN
I
2
(CMOS Input) Crystal Clock Input. This pin is a CMOS level input of either 2.048, 4.096, 8.192, 16.384, 32.768 or
65.536 MHz. A crystal of 16.384 MHz fromX_IN to X_OUT may also be used.
X_OUT
O
1
(CMOS Output) Crystal Clock Output.
REF_8K_3
or
REF_8K_OUT
I
O
7
(TTL Bi-Directional) Internal Master PLL (REF_8K_3). If configuration register bit C_43=0, this pin is a Local 8
KHz Reference 3 Input.
External Master PLL (REF_8K_OUT). If configuration register bit C_43=1, this pin is an 8 KHz Reference Output.
REF_8K_2
or
CLK_IN
I
6
(TTL Input) Internal Master PLL (REF_8K_2). If configuration register bit C_43=0, this pin is a Local 8 KHz Refer-
ence 2 Input.
External Master PLL (CLK_IN). If configuration register bit C_43=1, this is a clock input fromexternal master PLL.
REF_8K_1
I
5
(TTL Input) Local 8 KHz Reference 1 Input.
REF_8K_0
I
4
(TTL Input) Local 8 KHz Reference 0 Input.
SI_[3:0]
I
95,94,92,91
(TTL Input, Pull Up) Local Bus Serial Input Data Streams. This pin can be programmed to 2.048, 4.096 or 8.192
Mb/s data rates.
TXD_0
I
9
(TTL Input, Pull Up) Message Channel Transmt Data. This pin is for the SCbus Message channel transmt data
input line.
TEST
I
98
(TTL Input) NAND Gate Test Mode Enable. When in test mode (TEST=1) each pin except VDD/VSS/X_OUT is
nanded with the preceding pin and output at both DRQ_R and DRQ_T pins.
INT_1
I/O
15
(TTL Bi-directional) Interrupt Request 1. Reserved for future internal HDLC controller. If unused, this pin should be
left unconnected.
INT_0
I/O
14
(TTL Bi-directional) Interrupt Request 0. This pin will be asserted (controlled by C_[55:53]) if either SCbus Error,
SCbus CLKFAIL, Frame Boundary or Internal Master PLL Error and INT_0 unmasked (C_53 = 1).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SC4002A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LCD MODULES SC4002A ( 40 CHARACTERS x 2 LINES ) |
| SC4002ALM-6 | 功能描述:AMPLIFIER TRIP UNIVERSAL INPUT D 制造商:cynergy 3 系列:SC 零件狀態(tài):在售 類型:過程感應 跳脫狀態(tài):通電高/低 跳脫范圍:- 延遲時間:無延遲 電壓 - 電源:16 ~ 30VDC 輸出類型:繼電器 電路:SPDT（1 C 形） 不同電壓時的觸頭額定電流:3A @ 240VAC 安裝類型:DIN 軌道 工作溫度:0°C ~ 55°C 標準包裝:1 |
| SC4004 | 制造商:Ferraz Shawmut 功能描述: |
| SC4004A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LCD MODULES 40 CHARACTERS x 4 LINES |
| SC4004B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40 CHARACTERS x 4 LINES |
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