參數(shù)資料
型號(hào)： SAA7381
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： ATAPI CD-R block decoder
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP144
文件頁(yè)數(shù)： 57/108頁(yè)
文件大小： 380K
代理商： SAA7381
1997 Aug 12
57
Philips Semiconductors
Objective specification
ATAPI CD-R block decoder
SAA7381
Fig.10 Fast RAM access mode timing.
handbook, full pagewidth
MGK517
(2)
(1)
sub-CPU clock
sub-CPU ALE
XDA8
to
XDA15
XDA0 to XDA7, XDA8 to XDA15 latched
XDD0 to XDD7
RD/WR
(1) Address decoded in upper 16 kbytes indicates access to RAM or SAA7381 registers, RAM access begins, SAA7381 accesses RAM, stops clock
only if SAA7381 asserts RD or WR before access complete.
(2) 8051 microcontroller continues.
7.7.2
B
UFFER MEMORY ORGANISATION
Memory is mapped as a 12-bit block number and a 12-bit
offset into that block. The block oriented memory structure
permits the use of 16-bit pointers in software, minimising
the overhead of accessing memory. The address can be
found from the following equation:
address
block_number
2560
×
=
The sub-CPU sees the SAA7381 as a memory mapped
peripheral, with control and status registers appearing in
the highest 256 bytes of the external address space
(PDATA space).
The phrase (PDATA space) is meant to imply that the code
will access registers most efficiently if the PDATA
(8051 port P2) pointer is set to point at the register space
of the SAA7381. If the PDATA space is better used as
context switching space then it can be used for that
purpose.
All registers and RAM are accessible in the XDATA space
at all times, the PDATA is just a movable 256 byte window
with faster access into XDATA.
offset
+
The lowest 56 kbytes of the 8051 external address data
space is mappable as two windows into the memory of
52 kbytes and 4 kbytes, on any user-specified 256 byte
boundary within the RAM. This is usable as scratchpad
RAM.
The two pages permits the paging of process context
information for use with a multi-tasking kernel, while still
keeping some global variables.
The next 7.5 kbytes is mapped as a window into memory
starting at a user-specified block number. This is usable for
accessing block data, subcode information, error corrector
status and block headers.
The 64 kbytes memory mapping is shown in Fig.11.
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