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參數(shù)資料
| 型號： | SAA7381 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | ATAPI CD-R block decoder |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP144 |
| 文件頁數(shù)： | 42/108頁 |
| 文件大?。?/td> | 380K |
| 代理商： | SAA7381 |
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1997 Aug 12
42
Philips Semiconductors
Objective specification
ATAPI CD-R block decoder
SAA7381
7.5.3.15
ACMD
This is the ATAPI command register. This register is read-only to the microcontroller and write-only to the host. The host
should only write to this register when the ‘bsy’ and ‘drq’ flags are both zero (see ASTAT register; Section 7.5.3.7).
A ‘cmdi’ interrupt is generated when:
The host writes to this register while the SAA7381 is the selected drive (the ‘drv’ bit in register ADRSEL is equal to the
‘rdrv’ bit in register DTCTR)
The host writes the execute drive diagnostic command (90H) to this register.
The microcontroller interrupt (cmdi) is cleared by the SAA7381 when the ACMD register is read by the microcontroller.
7.5.3.16
ADCTR
This is the ATAPI device control register.
Table 68
ADCTR: address FF90H
Notes
1.
2.
Setting the ‘srst’ bit causes a ‘srsti’ interrupt and the ‘bsy’ bit to be set.
Bit ‘nien’ is used to enable or disable the host interrupt. When ‘nien’ is logic 0 and the drive is selected then the host
interrupt pin will be enabled. If ‘nien’ is logic 1 or the drive is not selected then the host interrupt pin will be in a
high-impedance state.
7.5.3.17
AFEAT
This is the ATAPI features register. See the ATAPI specification for a detailed description of these register bits.
Table 69
AFEAT: address FF91H
7.5.3.18
IFSTAT
Table 70
IFSTAT: address FF92H (note 1); see Table 71
Notes
1.
2.
All interrupts may be negated by writing a logic 1 to their associated IFSTAT locations.
These bits are flags which do not generate interrupts.
ACCESS
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
srst
(1)
BIT 1
nien
(2)
BIT 0
R
reserved
1
0
ACCESS
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
R
overlap
dma
ACCESS
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
(2)
BIT 2
BIT 1
(2)
BIT 0
(2)
RW
cmdi
dtei
drqi
ultra_stop
dtbsy
srsti
reset08
a0comp/
crc_error
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