
52
EPSON
S1C8F360 TECHNICAL MANUAL
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Output Ports)
5.6.5 Special output
Besides normal DC output, output ports R25–R27,
R34, R50 and R51 can also be assigned special
output functions in software or mask option as
shown in Table 5.6.5.1.
Table 5.6.5.1 Special output ports
<Special Outputs for S1C883xx>
The following special outputs are available when a
mask option compatible with the S1C883xx is
selected.
s CL and FR output (R25 and R26)
In order for the S1C8F360 to handle connection to
an externally expanded LCD driver, output ports
R25 and R26 can be used to output a CL signal
(LCD synchronous signal) and FR signal (LCD
frame signal), respectively.
The configuration of output ports R25 and R26 are
shown in Figure 5.6.5.1.
Register R25D
Register LCCLK
R25 output
CL signal
Register R26D
Register LCFRM
R26 output
FR signal
Fig. 5.6.5.1 Configuration of R25 and R26
The output control for the CL signal is done by the
register LCCLK. When you set "1" for the LCCLK,
the CL signal is output from the output port termi-
nal R25, when "0" is set, the HIGH (VDD) level is
output. At this time, "1" must always be set for the
data register R25D.
The output control for the FR signal is done by the
register LCFRM. When you set "1" for the LCFRM,
the FR signal is output from the output port terminal
R26, when "0" is set, the HIGH (VDD) level is output.
At this time, "1" must always be set for the data
register R26D.
The frequencies of each signal are changed as shown
in Table 5.6.5.2 according to the drive duty selection.
5.6.3 High impedance control
The output port can be high impedance controlled
in software.
This makes it possible to share output signal lines
with an other external device.
A high impedance control register is set for each
series of output port terminals as shown below.
Either complementary output and high impedance
state can be selected with this register.
Table 5.6.3.1 Correspondence between output ports and
high impedance control registers
*
This is a 2-bit reserved register, it can be used as a
general purpose register with read/write capa-
bilities.
When a high impedance control register HZRxx is
set to "1", the corresponding output port terminal
becomes high impedance state and when set to "0",
it becomes complementary output.
5.6.4 DC output
As Figure 5.6.1.1 shows, when "1" is written to the
output port data register, the output terminal
switches to HIGH (VDD) level and when "0" is
written it switches to LOW (VSS) level. When output
is in a high impedance state, the data written to the
data register is output from the terminal at the
instant when output is switched to complementary.
Register
Output port terminal
HZR0L
HZR0H
HZR1L
HZR1H
HZR20
HZR21
HZR22
HZR23
HZR24
HZR25
HZR26
HZR27
HZR30
HZR31
HZR32
HZR33
HZR34
HZR35
HZR36
HZR37
HZR4L
HZR4H
HZR50
HZR51
R00–R03
R04–R07
R10–R13
R14–R17
R20
R21
R22
R23
R24
R25
R26
R27
R30
R31
R32
R33
R34
R35
R36
R37
–
R50
R51
*
Output port
R25
R26
R27
R34
R50
R51
Special output
CL output
FR/TOUT output
TOUT output
FOUT output
BZ output
(Software selection)
(Mask option selection)
(Software selection)
(Mask option selection)