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參數(shù)資料
| 型號(hào)： | S1C6F567D0A0100 |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, UUC141 |
| 封裝： | DIE-141 |
| 文件頁(yè)數(shù)： | 65/208頁(yè) |
| 文件大?。?/td> | 1561K |
| 代理商： | S1C6F567D0A0100 |
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S1C6F567 TECHNICAL MANUAL
EPSON
149
CHAPTER 7: SUMMARY OF NOTES
Sound generator
(1) Since the BZ and XBZ signals are generated asynchronous to the BZE register, hazards may be pro-
duced when the signal goes ON/OFF due to the setting of the BZE register.
(2) The one-shot output is only valid when the normal buzzer output is OFF (BZE = "0") and will be
invalid when the normal buzzer output is ON (BZE = "1").
(3) Since the BZ and XBZ signals are the special outputs of the R01 and R00 ports, it is necessary to set the
high impedance control registers (R01HIZ, R00HIZ) to "0", the data registers (R01, R00) to "1" and the
output selection registers (BZOUT, XBZOUT) to "1" before setting the BZE register to "1".
SVD circuit
(1) To obtain a stable detection result, the SVD circuit must be ON for at least l00 sec. So, to obtain the
SVD detection result, follow the programming sequence below.
1. Set SVDON to "1"
2. Maintain for 100 sec minimum
3. Set SVDON to "0"
4. Read SVDDT
(2) The SVD circuit should normally be turned OFF because SVD operation increase current consump-
tion.
Telephone function
(1) It is necessary to turn the OSC3 oscillation on prior to a dialing operation in tone mode because the
tone mode uses the OSC3 (3.58 MHz) clock. However it increases current consumption. Therefore,
turn the OSC3 oscillation off after finishing the dialling operation in tone mode.
(2) Do not write "0" (0000B) to the IDP, FTS, PTS or TCD (in pulse mode) registers because it may cause a
malfunction.
(3) The pause function control bit PAUSE (FF14HD1) and the flash function control bit FLASH
(FF14HD0) are write-only, so software cannot control these functions (on address FF14H) using an
ALU instruction (AND, OR ...). Furthermore, be aware that the pause function or the flash function is
canceled when "0" is written to the PAUSE bit (FF14HD1) or the FLASH bit (FF14HD0).
Interrupt
(1) The interrupt factor flags are set when the interrupt condition is established, even if the interrupt
mask registers are set to "0".
(2) After an interrupt occurs, the same interrupt will occur again if the interrupt enabled state (I flag =
"1") is set or the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure
to reset (write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the
interrupt enabled state.
(3) After an initial reset, all the interrupts including NMI are masked until both the stack pointers SP1
and SP2 are set with the software. Be sure to set the SP1 and SP2 in the initialize routine.
Further, when re-setting the stack pointer, the SP1 and SP2 must be set as a pair. When one of them is
set, all the interrupts including NMI are masked and interrupts cannot be accepted until the other one
is set.
Flash EEPROM
(1) Inspection data is written to the PROM at shipment. Therefore, it must be programmed before
operating the IC in the normal operation mode (refer to Appendix).
(2) The Flash EEPROM data can be rewritten up to 100 times for both the code and data PROMs. Rewrit-
ing data is done at the user's own risk.
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