參數資料
型號: S1C63406F
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PQFP128
封裝: PLASTIC, TQFP15-128
文件頁數: 91/144頁
文件大?。?/td> 1160K
代理商: S1C63406F
42
EPSON
S1C63406 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (LCD Driver)
4.7 LCD Driver (COM0–COM8, SEG0–SEG59)
4.7.1 Configuration of LCD driver
The S1C63406 has 9 common terminals (COM0–COM8) and 60 segment terminals (SEG0–SEG59), so that
it can drive a dot matrix type LCD with a maximum of 540 (60
× 9) dots.
The driving method is 1/8 duty or 1/9 duty dynamic drive with four voltages (1/4 bias), VC1, VC2, VC4
and VC5.
LCD display ON/OFF can be controlled by the software.
4.7.2 Power supply for LCD driving
VC1–VC5 are driving voltages (1/4 bias) for the LCD that are generated by the LCD system voltage circuit.
Turning the LCD system voltage circuit ON or OFF is controlled with the LPWR register. When LPWR is
set to "1", the LCD system voltage circuit outputs the LCD drive voltages VC1–VC5 to the LCD driver.
The LCD system voltage circuit generates VC1 or VC2 with the voltage regulator incorporated in itself,
and generates three other voltages by boosting or reducing the voltage VC1 or VC2. Table 4.7.2.1 shows the
VC1, VC2, VC4 and VC5 voltage values and boost/reduce status.
Table 4.7.2.1 LCD drive voltage when generated internally
LCD drive voltage
VC1 (0.975–1.2 V)
VC2 (1.950–2.4 V)
VC4 (2.925–3.6 V)
VC5 (3.900–4.8 V)
VDD = 1.3–3.6 V
VC1 (standard)
2
× VC1
3
× VC1
4
× VC1
VDD = 2.5–3.6 V
1/2
× VC2
VC2 (standard)
3/2
× VC2
2
× VC2
The LCD drive voltage can be adjusted by the software
(see Section 4.7.5). Values in the table are typical values.
Select either VC1 standard or VC2 standard using the VCCHG register.
When "1" is written to the VCCHG register, VC2 standard is selected and when "0" is written, VC1 stan-
dard is selected. At initial reset, VC1 standard (VCCHG = "0") is set.
Note: Current consumption will be increased for a cycle of 1 kHz to stabilize the LCD power quickly after
setting LPWR on.
4.7.3 LCD display control (ON/OFF) and switching of duty
(1) Display ON/OFF control
The S1C63406 incorporates the ALON and ALOFF registers to blink display. When "1" is written to
ALON, all the dots go ON, and when "1" is written to ALOFF, all the dots go OFF. At such a time, an
ON waveform or an OFF waveform is output from SEG terminals. When "0" is written to these
registers, normal display is performed. Furthermore, when "1" is written to both of the ALON and
ALOFF, ALON (all ON) has priority over the ALOFF (all OFF).
(2) Switching of drive duty
In the S1C63406, the drive duty can be set to 1/8 or 1/9 by the software. This setting is done using the
LDUTY0 register as shown in Table 4.7.3.1.
Table 4.7.3.1 LCD drive duty setting
LDUTY0
1
0
Drive duty
1/8
1/9
Common terminal used
COM0–COM7
COM0–COM8
Maximum segment number
480 (60
× 8)
540 (60
× 9)
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