參數(shù)資料
型號(hào): S1C60L16F0A0100
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 0.032768 MHz, MICROCONTROLLER, PQFP80
封裝: PLASTIC, QFP14-80
文件頁(yè)數(shù): 9/105頁(yè)
文件大小: 841K
代理商: S1C60L16F0A0100
S1C60N16 TECHNICAL MANUAL
EPSON
1
CHAPTER 1: OVERVIEW
CHAPTER
1OVERVIEW
The S1C60N16 Series is a single-chip microcomputer made up of the 4-bit core CPU S1C6200C, ROM
(4,096 words
× 12 bits), RAM (256 words × 4 bits), LCD driver, analog comparator, event counter, watch-
dog timer, and two types of time base counter. Because of its low-voltage operation and low power
consumption, this series is ideal for a wide range of battery-driven applications. It is especially suitable
for various controller applications such as a clock, game and pager.
1.1 Configuration
The S1C60N16 Series is configured as follows, depending on supply voltage and oscillation circuits.
Table 1.1.1 Model configuration
Model
Supply voltage
Oscillation
circuit
LCD
power supply
S1C60N16
3.0 V
OSC1 only
(Single clock)
Supports
3.0 V LCD panels
S1C60L16
1.5 V
S1C60A16
3.0 V
OSC1 and OSC3
(Twin clock)
1.2 Features
Table 1.2.1 Features
Model
OSC1 oscillation circuit
OSC3 oscillation circuit
Instruction set
Instruction execution time
(differs depending on instruction)
(CLK: CPU operation frequency)
ROM capacity
RAM capacity
Input ports
Output ports
I/O ports
Serial interface
LCD driver
Time base counter
Watchdog timer
Event counter
Sound generator
Analog comparator
Supply voltage detection (SVD)
Heavy load protection function
External interrupt
Internal interrupt
Supply voltage
Current
consumption
(Typ. value)
Form when shipped
S1C60N16
S1C60L16
S1C60A16
Crystal oscillation circuit 32.768 kHz (Typ.)
CR or ceramic oscillation
circuit (selected by mask
option) 1 MHz (Typ.)
108 types
153
sec, 214 sec, 366 sec (CLK = 32.768 kHz)
–5
sec, 7 sec, 12 sec
(CLK = 1 MHz)
4,096 words
× 12 bits
256 words
× 4 bits
5 bits (pull-down resistor can be added by mask option)
8 bits (BZ, BZ, FOUT and SIOF outputs are available by mask option)
8 bits (pull-down resistor is added during input data read-out)
(3 bits can be configured as serial I/O ports by mask option)
1 port (8-bit clock synchronous system)
38 segments
× 4, 3, or 2 commons (selected by mask option)
V-3 V 1/4, 1/3 or 1/2 duty (voltage regulator and booster circuits built-in)
Two types (timer and stopwatch)
Built-in (can be disabled by mask option)
Two 8-bit inputs (dial input evaluation or independent)
Programmable in 8 sounds (8 frequencies)
Digital envelope built-in (can be disabled by mask option)
Inverted input
× 1, non-inverted input × 1
2.2 V
1.2 V
2.2 V
Not implemented
Implemented
Input interrupt: 2 systems
Time base counter interrupt: 2 systems
Serial interface interrupt: 1 system
3.0 V (2.2–3.6 V)
1.5 V (1.2–1.8 V)
3.0 V (2.2–3.6 V)
0.7
A0.7 A1.5 A
(Normal operation mode)
1.4
A1.4 A2.4 A
(Normal operation mode)
––
50
A
(Normal operation mode)
––
85
A
(Normal operation mode)
QFP5-80pin(S2), QFP14-80pin or chip
CLK= 32.768 kHz
(when halted)
CLK= 32.768 kHz
(when executed)
CLK= 1 MHz (ceramic)
(when executed)
CLK= 1 MHz (CR)
(when executed)
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