參數(shù)資料
型號: S1C60L16F0A0100
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 0.032768 MHz, MICROCONTROLLER, PQFP80
封裝: PLASTIC, QFP14-80
文件頁數(shù): 27/105頁
文件大?。?/td> 841K
代理商: S1C60L16F0A0100
18
EPSON
S1C60N16 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Oscillation Circuit)
4.3.3 OSC3 oscillation circuit (S1C60A16)
The S1C60A16 has built-in the OSC3 oscillation circuit that generates the CPU's sub-clock (Typ. 1 MHz)
for high speed operation and the source clock for the serial interface. The mask option enables selection
of CR or ceramic oscillation circuit.
Figure 4.3.3.1 is the block diagram of the OSC3 oscillation circuit.
C CR
OSC3
OSC4
R
CR
VSS
CGC
CDC
Ceramic
OSC4
OSC3
R
RDC
FC
To CPU
(and serial interface)
Oscillation circuit control signal
To CPU
(and serial interface)
Oscillation circuit control signal
(a) CR oscillation circuit
(b) Ceramic oscillation circuit
S1C60A16
Fig. 4.3.3.1 OSC3 oscillation circuit
As shown in Figure 4.3.3.1, the CR oscillation circuit can be configured simply by connecting the resistor
RCR between the OSC3 and OSC4 terminals when CR oscillation is selected. See Chapter 7, "Electrical
Characteristics", for resistance value of RCR.
When ceramic oscillation is selected, the ceramic oscillation circuit can be configured by connecting the
ceramic oscillator (Typ. 1 MHz) between the OSC3 and OSC4 terminals, capacitor CGC between the OSC3
and OSC4 terminals, and capacitor CDC between the OSC4 and VSS terminals. See Chapter 7, "Electrical
Characteristics", for capacitor values of CGC and CDC. To reduce current consumption of the OSC3
oscillation circuit, oscillation can be stopped by the software (OSCC register).
For the S1C60N16 and S1C60L16 (single clock model), do not connect anything to terminals OSC3 and
OSC4.
4.3.4 Switching the system clock (S1C60A16)
In the S1C60A16, the CPU system clock is switched to OSC1 or OSC3 by the software (CLKCHG register).
When OSC3 is to be used as the CPU clock, it should be done as the following procedure using the
software: turn the OSC3 oscillation ON and wait at least 5 msec for oscillation stabilization, then switch
the CPU clock after waiting 5 msec or more.
When switching from OSC3 to OSC1, switch the CPU clock, then turn the OSC3 oscillation circuit off.
OSC1
→ OSC3
OSC3
→ OSC1
1. Set OSCC to "1" (OSC3 oscillation ON).
1. Set CLKCHG to "0" (OSC3
→ OSC1).
2. Maintain 5 msec or more.
2. Set OSCC to "0" (OSC3 oscillation OFF).
3. Set CLKCHG to "1" (OSC1
→ OSC3).
相關PDF資料
PDF描述
S1C60N01F 4-BIT, MROM, 0.08 MHz, MICROCONTROLLER, PQFP48
S1C60N02D 4-BIT, MROM, 0.08 MHz, MICROCONTROLLER, UUC52
S1C60L02 4-BIT, MROM, 0.08 MHz, MICROCONTROLLER, PQFP60
S1C60N04D 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC48
S1C60N08D 4-BIT, MROM, 0.032768 MHz, MICROCONTROLLER, UUC96
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