
11 16-bit Timer (T16)
S1C17003 TECHNICAL MANUAL
EPSON
11-17
0x4228/0x4248/0x4268: 16-bit Timer Ch.x Interrupt Control Registers (T16_INTx)
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
16-bit Timer
Ch.x Interrupt
Control Register
(T16_INTx)
0x4228
0x4248
0x4268
(16 bits)
D15–9 –
reserved
–
0 when being read.
D8
T16IE
16-bit timer interrupt enable
1 Enable
0 Disable
0
R/W
D7–1 –
reserved
–
0 when being read.
D0
T16IF
16-bit timer interrupt flag
1 Cause of
interrupt
occurred
0 Cause of
interrupt not
occurred
0
R/W Reset by writing 1.
Note: The “x” in register names indicates the channel number (0 to 2).
0x4228: 16-bit Timer Ch.0 Interrupt Control Register (T16_INT0)
0x4248: 16-bit Timer Ch.1 Interrupt Control Register (T16_INT1)
0x4268: 16-bit Timer Ch.2 Interrupt Control Register (T16_INT2)
D[15:9]
Reserved
D8
T16IE: 16-bit Timer Interrupt Enable Bit
Permits or prevents interrupts caused by counter underflows for each channel.
1 (R/W): Permit interrupt
0 (R/W): Prevent interrupt (default)
Setting T16IE to 1 enables 16-bit timer interrupt requests to the ITC; setting to 0 prevents interrupts.
D[7:1]
Reserved
D0
T16IF: 16-bit Timer Interrupt Flag
Interrupt flag indicating the counter underflow interrupt cause occurrence status for each channel.
1 (R): Interrupt cause present
0 (R): No interrupt cause (default)
1 (W): Reset flag
0 (W): Disable
T16IF is the T16 module interrupt flag. Setting T16IE (D8) to 1 sets the counter to 1 if an underflow
occurs during counting. A 16-bit timer interrupt request signal is output to the ITC at the same time. An
interrupt is generated if interrupt conditions are satisfied for the ITC and S1C17 core.
Writing 1 to this bit resets T16IF.
Note: To prevent interrupt recurrences, the T16 module interrupt flag T16IF must be reset within
the interrupt processing routine following a 16-bit timer interrupt.
To prevent unwanted interrupts, reset T16IF before permitting 16-bit timer interrupts with
T16IE.
T16