
11 16-bit Timer (T16)
S1C17003 TECHNICAL MANUAL
EPSON
11-1
T16
11 16-bit Timer (T16)
11.1 16-bit Timer Overview
The S1C17003 incorporates a 3-channel 16-bit timer (T16).
The 16-bit timer consists of a 16-bit presettable down counter and a 16-bit reload data register holding the preset
values. The timer counts down from the initial value set in the reload data register and outputs an underflow signal
when the counter underflows. The underflow signal is used to generate an interrupt and an internal serial interface
clock. The underflow cycle can be programmed by selecting the prescaler clock and reload data, enabling the
application program to obtain time intervals and serial transfer speeds as required.
The timer also combines an event counter function via the input/output port pins and the external input signal pulse
width measurement function.
Figure 11.1.1 illustrates the 16-bit timer configuration.
Reload data register
T16_TRx
PRUN
DF[3:0]
PRESER
Down counter
T16_TCx
Control
circuit
CKACTV
CKSL[1:0]
TRMD
Prescaler
PCLK
-1/1 to 1/16 K
Underflow
RUN/STOP control
Count clock selection
Interrupt request
Serial transfer clock
To ITC
ADC (conversion trigger) (from Ch.0)
To SPI (from Ch.1)
To I2CM (from Ch.2)
P02 (Ch.0)
P13 (Ch.1)
P14 (Ch.2)
Timer reset
External input signal
polarity selection
Operating mode
selection
Count mode selection
Inter
nal
data
bu
s
16-bit timer Ch.x
Figure 11.1.1: 16-bit timer configuration (1-channel)
Note: The 3-channel 16-bit timer module has the same functions except for the control register
address. The description in this section applies to all channels of the 16-bit timer. The “x” in
the register name refers to the channel number (0 to 2). The register addresses are referenced
as “Ch.0,” “Ch.1,” and “Ch.2.”
Example: T16_CTLx register (0x4226/0x4246/0x4266)
Ch.0: T16_CTL0 register (0x4226)
Ch.1: T16_CTL1 register (0x4246)
Ch.2: T16_CTL2 register (0x4266)