
10 Input/Output Port (P)
10-16
EPSON
S1C17003 TECHNICAL MANUAL
0x5207/5217: Px Port Interrupt Flag Registers (Px_IFLG)
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
P0 Port
Interrupt Flag
Register
(P0_IFLG)
0x5207
(8 bits)
D7–0
P0IF[7:0]
P0[7:0] port interrupt flag
1 Cause of
interrupt
occurred
0 Cause of
interrupt not
occurred
0
R/W Reset by writing 1.
P1 Port
Interrupt Flag
Register
(P1_IFLG)
0x5217
(8 bits)
D7–0
P1IF[7:0]
P1[7:0] port interrupt flag
1 Cause of
interrupt
occurred
0 Cause of
interrupt not
occurred
0
R/W Reset by writing 1.
Note: The “x” in the bit names indicates the port number (0 or 1).
D[7:0]
PxIF[7:0]: Px[7:0] Port Interrupt Flags
These are interrupt flags indicating the interrupt factor occurrence status.
1(R):
Interrupt factor present
0(R):
No interrupt factor (default)
1(W):
Reset flag
0(W):
Disabled
PxIF[7:0] are interrupt flags corresponding to the individual 16 ports of P0[7:0] and P1[7:0]. PxIF[7:0]
will be set to 1 at the specified edge (rising or falling edge) of the input signal. A P0 or P1 port interrupt
request signal is also output to the ITC at the same time if the corresponding PxIE[7:0] is set to 1. This
interrupt request signal causes the P0/P1 port interrupt flag inside the ITC to be set to 1. Meeting the
ITC and S1C17 core interrupt conditions generates an interrupt.
PxIF[7:0] is reset by writing as 1.
Note: The P port module interrupt flag PxIF[7:0] must be reset within the interrupt processing
routine following a port interrupt to prevent recurring interrupts.
To prevent genarating unnecessary interrupts, reset the relevant PxIF[7:0] before
permitting interrupts for the required port using PxIE[7:0] (Px_IMSK register).
P0IE[7:0]: P0[7:0] Port Interrupt Enable Bits in the P0 Port Interrupt Mask (P0_IMSK) Register
(D[7:0]/0x5205)
P1IE[7:0]: P1[7:0] Port Interrupt Enable Bits in the P1 Port Interrupt Mask (P1_IMSK) Register
(D[7:0]/0x5215)