
3 Memory Map and Bus Control
S1C17003 TECHNICAL MANUAL
EPSON
3-5
3.3 Internal RAM Area
3.3.1 Internal RAM
RAM exists in a 4-Kbyte area from address 0x0 to 0xfff. This RAM can be accessed in one cycle for reading or
writing. In addition to storing variables, it can also be used to copy instruction codes and execute them rapidly in
RAM.
Note: The last 64 bytes of the internal RAM (0xfc0 to 0xfff) are reserved for on-chip debugging.
This area should not be accessed by application programs when using debug functions (for
example, during application development).
It can be used for applications in mass-produced products that do not require debugging.
The S1C17003 enables the RAM size used to apply restrictions to 4 KB or 2 KB. For example, when using the
S1C17003 to develop products with internal ROM, you can set the RAM size to match that of the target product,
preventing creating programs that seek to access areas outside the RAM areas of the target product.
The RAM size is selected using IRAMSZ[1:0] (D[1:0]/MISC_IRAMSZ register).
0x5326: IRAM Size Select Register (MISC_IRAMSZ)
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
IRAM Size
Select Register
(MISC_IRAMSZ)
0x5326
(16 bits)
D15–2 –
reserved
–
0 when being read.
D1–0 IRAMSZ[1:0] IRAM size select
IRAMSZ[1:0]
Read cycle
0x2 R/W
0x3
0x2
0x1
0x0
2KB
4KB
reserved
D[1:0]
IRAMSZ[1:0]: IRAM Size Select Bits
Select the internal RAM size used.
Table 3.3.1.1: Internal RAM size selection
IRAMSZ[1:0]
Internal RAM size
0x3
2 KB
0x2
4 KB
0x1
reserved
0x0
reserved
(Default: 0x2)
Note: The IRAM Size Select Register is write-protected. The write-protection must be overridden by
writing 0x96 to the MISC Protect Register (0x5324). Note that MISC Protect Register (0x5324)
should normally be set to a value other than 0x96, except when writing to the IRAM Size
Select Register. Unnecessary writes may result in system malfunctions.
MAP