參數(shù)資料
型號： PSD854F2A-90MT
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 256K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52
封裝： ROHS COMPLIANT, PLASTIC, QFP-52
文件頁數(shù)： 61/128頁
文件大小： 1045K
代理商： PSD854F2A-90MT
Erasing Flash memory
PSD8XXFX
Doc ID 7833 Rev 7
9
Erasing Flash memory
9.1
Flash Bulk Erase
The Flash Bulk Erase instruction uses six WRITE operations followed by a READ operation
of the status register, as described in Table 10. If any byte of the Bulk Erase instruction is
wrong, the Bulk Erase instruction aborts and the device is reset to the Read Flash memory
status.
During a Bulk Erase, the memory status may be checked by reading the Error flag bit (DQ5),
the Toggle flag bit (DQ6), and the Data Polling flag bit (DQ7), as detailed in Section 8:
Programming Flash memory. The Error flag bit (DQ5) returns a '1' if there has been an
Erase Failure (maximum number of Erase cycles have been executed).
It is not necessary to program the memory with 00h because the PSD automatically does
this before erasing to 0FFh.
During execution of the Bulk Erase instruction, the Flash memory does not accept any
instructions.
9.2
Flash Sector Erase
The Sector Erase instruction uses six WRITE operations, as described in Table 10.
Additional Flash Sector Erase codes and Flash memory sector addresses can be written
subsequently to erase other Flash memory sectors in parallel, without further coded cycles,
if the additional bytes are transmitted in a shorter time than the timeout period of about
100s. The input of a new Sector Erase code restarts the timeout period.
The status of the internal timer can be monitored through the level of the Erase timeout flag
bit (DQ3). If the Erase timeout flag bit (DQ3) is ’0,’ the Sector Erase instruction has been
received and the timeout period is counting. If the Erase timeout flag bit (DQ3) is '1,' the
timeout period has expired and the PSD is busy erasing the Flash memory sector(s). Before
and during Erase timeout, any instruction other than Suspend Sector Erase and Resume
Sector Erase instructions abort the cycle that is currently in progress, and reset the device
to READ mode. It is not necessary to program the Flash memory sector with 00h as the
PSD does this automatically before erasing (byte = FFh).
During a Sector Erase, the memory status may be checked by reading the Error flag bit
(DQ5), the Toggle flag bit (DQ6), and the Data Polling flag bit (DQ7), as detailed in
During execution of the Erase cycle, the Flash memory accepts only Reset and Suspend
Sector Erase instructions. Erasure of one Flash memory sector may be suspended, in order
to read data from another Flash memory sector, and then resumed.
9.3
Suspend Sector Erase
When a Sector Erase cycle is in progress, the Suspend Sector Erase instruction can be
used to suspend the cycle by writing 0B0h to any address when an appropriate Sector
Select (FS0-FS7 or CSBOOT0-CSBOOT3) is high. (See Table 10). This allows reading of
data from another Flash memory sector after the Erase cycle has been suspended.
Suspend Sector Erase is accepted only during an Erase cycle and defaults to READ mode.
相關(guān)PDF資料
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PSH665-FREQ-OUT1 VCXO, SINE OUTPUT, 465 MHz - 865 MHz
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PSD-8M-01 制造商:Richco 功能描述:CB SPT REST MNT NAT 8MM SPC
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