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參數(shù)資料
| 型號： | PCT1789N |
| 英文描述： | PCT303DL |
| 中文描述： | PCT303DL |
| 文件頁數(shù)： | 5/40頁 |
| 文件大?。?/td> | 632K |
| 代理商： | PCT1789N |
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PC-TEL, Inc.
14
1789N0DOCDAT01A-0399
PCT1789N DATA SHEET
303DL P
IN
D
ESCRIPTIONS
!
PRELIMINARY
PRELIMINARY
303DL P
IN
D
ESCRIPTIONS
PCT303D Pin Description
Table 5 PCT303D Pin Description
Name
Serial Interface
MCLK
Number
I/O Description
1
I
Master clock input. High speed master clock input. Generally supplied by the system
crystal clock or modem/DSP.
Serial port bit clock output. Controls the serial data on SDOUT and latches the data on
SDIN.
Serial port data in. Serial communication and control data that is generated by the
modem/DSP and presented as an input to the PCT303D.
Serial port data out. Serial communication data that is provided by the PCT303D to the
Modem/DSP.
I/O Frame sync output/input (master/slave). Data framing signal that is used to indicate
the start and stop of a communication data frame.
O
Secondary transfer request input/Ring detect. As FC, this pin is an optional signal to
instruct the PCT303D that control data is being requested in a secondary frame. When
daisy-chain is enabled, this pin becomes the ring detect output, RGDT, which pro-
duces an active-low, half-wave rectified version of the ring signal.
SCLK
3
O
SDI
6
I
SDO
5
O
FSYNC
2
FC/
RGDT
7
Control Interface
RGDT/
FSD
15
O
Ring detect/Delayed frame sync. As RGDT, this pin is an output signal that indicates
the status of a ring signal, which produces an active-low, half-wave rectified version of
the ring signal. When daisy-chain is enabled, this signal becomes a delayed frame
sync, FSD, to drive a slave device.
Off hook. Input control signal that provides a termination across tip and ring for line
seizing and pulse dialing, active-low. This pin must be enabled by the OHE bit of reg-
ister 5.
Reset input. An active-low input that is used to reset all control registers to a defined,
initialized state. Also used to bring the 303DL out of sleep mode.
Mode select 0. One of two mode select pins that is used to select the operation of the
serial port/DSP interface.
Mode select 1. The second of two mode select pins that is used to select the operation
of the serial port/DSP interface.
OFHK
16
I
RESET
8
I
M0
14
M1
10
Miscellaneous Signals
AOUT
9
O
Analog speaker output. Provides an analog output signal for driving a call progress
speaker.
Isolation capacitor 1A. Connects to one side of the isolation capacitor C1.
C1A
Power Signals
VD
11
4
Digital supply voltage. Provides the digital supply voltage to the PCT303D. Nominally
either 5V or 3.3V.
Analog supply voltage. Provides the analog supply voltage for the PCT303D. Nomi-
nally either 5V. If the internal charge pump is used, this pin should simply be bypassed
with a 0.1 μF capacitor.
Ground. Connects to the system digital ground.
VA
13
GND
12
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