PC-TEL, Inc.
43
1789N0DOCDAT01A-0399
PCT1789N DATA SHEET
303DL C
ONTROL
R
EGISTERS
!
PRELIMINARY
PRELIMINARY
303DL C
ONTROL
R
EGISTERS
Any register not listed here is reserved and should not be written. Undefined/unimplemented registers return 0.
Control 1
(Register 1, R/W)
Reset settings: 00h
Bit Definitions:
Control 2
(Register 2, R/W)
Reset settings: 03h
Bit Definitions:
SR
7
Reserved
4
DL
1
SB
0
6
5
3
2
Bits
Name
SR
Description
Software reset.
1 = Sets all registers to their reset value.
0 = Enables chip for normal operation.
Reserved. Read returns zero.
Isolation digital loopback. 1 = Enables digital loopback mode across isolation
barrier.
Serial digital interface mode.
1 = The serial port is operating in 16-bit mode and requires use of the secondary
frame sync signal, FC/RGDT, to initiate control data reads/writes.
0 = Operation is in 15-bit mode and the LSB of the data field indicates whether a
secondary frame is required.
7
6:2
1
Reserved
DL
0
SB
Reserved
AL
3
Reserved
2
HBE
1
RXE
0
7
6
5
4
Bits
Name
Reserved
AL
Reserved
HBE
RXE
Description
Reserved. Read returns zero.
Analog loopback. 1 = Enables analog loopback mode.
Reserved. Read returns zero.
Hybrid enable. 1 = Connects transmit path in hybrid.
Receive enable. 1 = Enables receive path.
7:4
3
2
1
0