
Power management:
OX16PCI954 complies with PCI Power Management
Specification 1.0 and PC98/99 Power Management
specifications. Both functions offer the extended
capabilities for Power Management. This achieves
significant power saving by enabling device drivers to
power down the PCI function and the channel clock (in
power state D3). Wake-up is requested via PME#fromRI
in power-state D3 or any modemline and SIN in power-
state D2.
Optional EEPROM:
OX16PCI954 can be reconfigured froman external
EEPROM. However, this is not required in many
applications as default values are provided for typical
applications up to 8 serial ports, and in some cases the
2 B
LOCK
D
IAGRAM
Data Sheet Revision 1.3
Page 6
OX16PCI954
OXFORD SEMICONDUCTOR LTD.
SubsystemID and SubsystemVendor ID can be set via
input pins.
Multi-function device:
OX16PCI954 is a multi-function device to enable users to
load individual device drivers for internal serial ports, the
internal parallel port and peripheral devices connected to
the Local Bus.
Quad Internal OX16C950 UARTs
OX16PCI954 contains four ultra-high performance UARTs,
which can increase driver efficiency using features such as
128-byte deep transmtter & receiver FIFOs, data rates up
to 60Mbps, flexible clock options, automatic flow control,
programmable interrupt and flow control trigger levels and
readable FIFO levels.
I
Function
1
LBD[7:0]
LBA[7:0]
LBCS[3:0]
LBWR#
LBRD#
LBRST
Function
0
Interrupt
logic
PCI
interface
AD[31:0]
C/BE[3:0]#
FRAME#
DEVSEL#
IRDY#
TRDY#
STOP#
CLK
PAR
SERR#
PERR#
IDSEL
RST#
INTA#
INTB#
PME#
FIFOSEL
Config.
interface
MODE[1:0]
XTALO
XTALI
Clock &
Baud rate
generator
UART_Ck_Out
LBCLK
EE_DO
EE_DI
EEPROM
interface
EE_CK
EE_CS
Quad
UARTs
SOUT[3:0]
SIN[3:0]
RTS[3:0]#
DTR[3:0]#
CTS[3:0]#
DSR[3:0]#
DCD[3:0]#
RI[3:0]#
MIO pins
MIO[11:0]
Parallel
port
PD[7:0]
ACK#
PE
BUSY
SLCT
ERR#
SLIN#
INIT#
AFD#
STB#
Local
Bus
Figure 1: OX16PCI954 Block Diagram