- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383727 > OX16PCI954-TQC60-A (Electronic Theatre Controls, Inc.) Integrated Quad UART and PCI interface PDF資料下載
參數(shù)資料
| 型號： | OX16PCI954-TQC60-A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Integrated Quad UART and PCI interface |
| 中文描述： | 綜合四UART和PCI接口 |
| 文件頁數(shù)： | 57/72頁 |
| 文件大?。?/td> | 656K |
| 代理商： | OX16PCI954-TQC60-A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁當前第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁
Data Sheet Revision 1.3
Page 57
OX16PCI954
OXFORD SEMICONDUCTOR LTD.
10.2.2 Zone1: Local Configuration Registers
The Zone1 region of EEPROMcontains the programvalue
of the vendor-specific Local Configuration Registers using
one or more configuration WORDs. Registers are selected
using a 7-bit byte-offset field. This offset value is the offset
fromBase Address Registers in I/O or memory space (see
section 6.4).
Note: Not all of the registers in the Local Configuration Register set are
writable by EEPROM. If bit2 of the header is set, Zone1
configuration WORDs follow the header declaration. The
format of configuration WORDs for the Local Configuration
Registers in Zone1 are described in Table 32.
Bits
15
Description
‘0’ = There are no more Configuration WORDs
to follow in Zone1. Move to the next available
zone or end EEPROMprogramif no more zones
are enabled in the Header.
‘1’ = There is another Configuration WORD to
follow for the Local Configuration Registers.
14:8 These seven bits define the byte-offset of the
Local configuration register to be programmed.
For example the byte-offset for LT2[23:16] is
0x0E.
7:0
8-bit value of the register to be programmed
Table 32: Zone 1 data format
Table 33 shows which Local Configuration registers are writable fromthe EEPROM. Note that an attempt by the EEPROMto
write to any other offset locations can result in unpredictable behaviour.
Offset
Bits
Description
0x00
1:0
Must be ‘00’.
0x00
2
Enable UART clock-out.
0x00
4:3
Endian byte-lane select.
0x00
6:5
Power-down filter.
0x00
7
MIO2_PME enable.
0x04
7:0
Multi-purpose IO configuration.
0x05
7:0
Multi-purpose IO configuration.
0x06
7:0
Multi-purpose IO configuration.
0x08
7:0
Local Bus timng parameters
0x09
7:0
Local Bus timng parameters
0x0A
7:0
Local Bus timng parameters
0x0B
7:0
Local Bus timng parameters
0x0C
7:0
Local Bus timng parameters
0x0D
7:0
Local Bus timng parameters
0x0E
3:0
Must be ‘0000’.
0x0E
6:4
IO Space Block size.
0x0E
7
Lower-Address-CS-Decode.
0x0F
2:0
Lower-Address-CS-Decode.
0x0F
4:3
Memory space block size in 32-bit Local Bus.
0x0F
5
Must be ‘0’.
0x0F
6
Local Bus clock enable.
0x0F
7
Bus interface type.
0x1E
3:0
UART Interrupt Mask
0x1E
4
MIO0/Parallel Port interrupt mask
0x1E
7:5
Multi-purpose IO interrupt mask.
0x1F
7:0
Multi-purpose IO interrupt mask.
Reference
LCC[2]
LCC[4:3]
LCC[6:5]
LCC[7]
MIC[7:0]
MIC[15:8]
MIC[23:16]
LT1[7:0]
LT1[15:8]
LT1[23:16]
LT1[31:24]
LT2[7:0]
LT2[15:8]
LT2[22:20]
LT2[23]
LT2[26:24]
LT2[28:27]
LT2[30]
LT2[31]
GIS[19:16]
GIS[20]
GIS[23:21]
GIS[31:24]
Table 33: EEPROM-writable Local Configuration Registers
相關PDF資料 |
PDF描述 |
|---|---|
| OX4240 | OCXO |
| OX1040 | OCXO |
| OX1041 | OCXO |
| OX1042 | OCXO |
| OX1140 | OCXO |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| OX16PCI954-TQC60-A1 | 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Integrated Quad UART and PCI interface |
| OX16PCI958 | 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Octal UART with PCI Interface |
| OX16PCI958-PQAG | 功能描述:外圍驅動器與原件 - PCI Universal PCI bridge to octal serial port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| OX-1700-BAE-107 | 制造商:VECTRON 制造商全稱:Vectron International, Inc 功能描述:Oven Controlled Crystal Oscillator |
| OX-1700-BAE-108 | 制造商:VECTRON 制造商全稱:Vectron International, Inc 功能描述:Oven Controlled Crystal Oscillator |
發(fā)布緊急采購，3分鐘左右您將得到回復。