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| 型號： | OX16PCI954-TQC60-A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Integrated Quad UART and PCI interface |
| 中文描述： | 綜合四UART和PCI接口 |
| 文件頁數(shù)： | 28/72頁 |
| 文件大小： | 656K |
| 代理商： | OX16PCI954-TQC60-A |
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disable all masks with the exception of the Ring Indicator,
so only a modemring can wake up the computer.
When Function0 issues a wake up request, the
PME_Status (PMCSR[15]) will be set. This is a sticky bit
which will be cleared by writing a ‘1’ to it. While PME_En
(PMCSR[8]) in Function0 is set, PME_Status will assert the
PME#pin to informthe device driver that a power
management wake up event has occurred. After a wake up
event is signalled, the device driver is expected to return
the function to the D0 power-state.
Data Sheet Revision 1.3
Page 28
OX16PCI954
OXFORD SEMICONDUCTOR LTD.
6.6.2
The power-down request for the Local Bus (Function1) is
application-dependent. The device driver can use any of
the multi-purpose I/O lines, MIO[12:3] to issue a power-
down request.
Function1 implements the PCI Power Management power-
states D0, D2 and D3. Whenever the device driver
changes the power-state to state D2 or D3, Function1
takes the following actions:-
The external UART_Clk_Out pin is disabled
regardless of the programmed value in LCC[2].
Power Management of function 1
The Local Bus clock pin, LBCK, is disabled regardless
of the programmed value in LT2[30].
The PCI interrupt for Function1 is disabled.
Access to I/O or Memory BARs of Function1 is
disabled.
However, access to the configuration space is still enabled.
The device driver can optionally assert/de-assert any of its
selected (design dependant) MIO pins to switch off VCC,
disable other external clocks, or activate shut-down modes
to any external devices on the Local Bus.
Function1 can issue a wake up request by using the MIO2
pin. When LCC[7] is set, rising or falling edge of MIO2 will
cause Function1 to issue a wake up request by setting
PME_Status = (PMCSR[15]), if it is enabled by PMCSR[8]
of Function1. When LCC[7] is set, the MIO2 pin will remain
in input mode regardless of the value programmed in
MIC[5], However MIC[4] still controls the input sense.
PME_Status is a sticky bit which will be cleared by writing a
‘1’ to it. While PME_En (PMCSR[8]) bit in Function1 is set,
PME_Status will assert the PME#pin to informthe device
driver that a power management wake up event has
occurred. After a wake up event is signalled, the device
driver is expected to return the function to the D0 power-
state. Settings for wake up events are shown in Table 12.
LCC[6:5]
GIS[21]
Power-down
Filter Time
N/A
Operation
00
X
Function0 power-down interrupt is disabled. MIO1 can assert as
interrupt is GIS[21] is set.
Function0 power-down interrupt is disabled. GIS[5]
reflects the state of the internal power-down mode for
Polling operation. MIO1 interrupt is disabled.
Function0 power-down is enabled. GIS[5] reflects the state
of the internal power-down mode. MIO1 interrupt is
disabled.
01
10
11
01
10
11
0
0
0
1
1
1
4 s
129 s
518 s
4 s
129 s
515 s
Table 11: Function 0 (UARTs) Power down interrupt settings
MIC[4]
MIO2 Rising
MIO2 Falling
X
X
0
yes
0
no
1
X
1
X
LCC[7]
0
1
1
1
1
Function1 PME_Status
Remains unchanged
Gets set
Remains unchanged
Gets set
Remains unchanged
X
X
X
Yes
No
Table 12: Function 1 (Local Bus) Wake-up configuration
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