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參數(shù)資料
| 型號： | NCT7491RQR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 54/80頁 |
| 文件大?。?/td> | 844K |
| 描述： | IC REMOTE THERMAL MONITOR 24QSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | * |
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NCT7491
http://onsemi.com
54
Table 66. REGISTER 0x42 Interrupt Status Register 2 (PowerOn Default = 0x00)
Bit
Name
R/W
Description
<0>
12 V
R
A 1 indicates that the 12 V high or low limit has been exceeded. This bit is cleared on a read of the
status register only if the error condition has subsided.
<1>
OOL
R
OOL = 1 indicates that an outoflimit event has been latched in Status Register 3 (0x43). This bit is a
logical OR of all status bits in Status Register 3 Software can test this bit in isolation to determine
whether any of the voltage, temperature, or fan speed readings represented by Status Register 3 are
outoflimit, which eliminates the need to read Status Register 3 during every interrupt or polling cycle.
<2>
FAN1
R
FAN1 = 1 indicates that Fan 1 has dropped below minimum speed or has stalled. This bit is not set
when the PWM 1 output is off.
<3>
FAN2
R
FAN2 = 1 indicates that Fan 2 has dropped below minimum speed or has stalled. This bit is not set
when the PWM 2 output is off.
<4>
FAN3
R
FAN3 = 1 indicates that Fan 3 has dropped below minimum speed or has stalled. This bit is not set
when the PWM 3 output is off.
<5>
FAN4
R
When Pin 14 on the QSOP package, Pin 11 on the QFN package is programmed as a TACH4 input,
FAN4 = 1 indicates that Fan 4 has dropped below minimum speed or has stalled. This bit is not set
when the PWM3 output is off.
<6>
D1
R
D1 = 1 indicates either an open or short circuit on the Thermal Diode 1 inputs.
<7>
D2
R
D2 = 1 indicates either an open or short circuit on the Thermal Diode 2 inputs.
Table 67. REGISTER 0x43 Interrupt Status Register 3 (PowerOn Default = 0x00)
Bit
Name
R/W
Description
<0>
PECI0
R
A logic 1 indicates that the PECI high or low limit has been exceeded by the PECI value from PECI client
address 0x30. This bit is cleared on a read of the status register only if the error condition has subsided.
<1>
Data
R
A logic 1 indicates that valid PECI data cannot be obtained for the processor and a specified error code
has been recorded.
<2>
Comm
R
A logic 1 indicates that there is a communications error (e.g. invalid FCS) on the PECI interface.
<3>
OVT
R
OVT = 1 indicates that one of the THERM
over temperature limits has been exceeded. This bit is cleared
on a read of the status register when the temperature drops below THERM
T
HYST
.
<6:4>
DAT
R
If a DATA error occurs then bits <6:4> indicate the error type
<000> = General sensor error (0x8000)
<001> = Sensor underflow (0x8002)
<010> = Sensor overflow (0x8003)
<111> = Other
<7>
OOL3
R
OOL3 = 1 indicates that an outoflimit event has been latched in Status Register 4 (0x81). This bit is a
logical OR of all status bits in Status Register 4 Software can test this bit in isolation to determine wheth-
er any of the voltage, temperature, or fan speed readings represented by Status Register 4 are outof
limit, which eliminates the need to read Status Register 4 during every interrupt or polling cycle.
Table 68. VOLTAGE LIMIT REGISTERS (Note 20)
Register Address
R/W
Description (Note 21)
PowerOn Default
0x44
R/W
2.5 V low limit.
0x00
0x45
R/W
2.5 V high limit.
0xFF
0x46
R/W
V
CCP
low limit.
0x00
0x47
R/W
V
CCP
high limit.
0xFF
0x48
R/W
V
CC
low limit.
0x00
0x49
R/W
V
CC
high limit.
0xFF
0x4A
R/W
5 V low limit.
0x00
0x4B
R/W
5 V high limit.
0xFF
0x4C
R/W
12 V low limit.
0x00
0x4D
R/W
12 V high limit.
0xFF
20.Setting the Configuration Register 1 lock bit has no effect on these registers.
21.High limits: An interrupt is generated when a value exceeds its high limit (> comparison). Low limits: An interrupt is generated when a value
is equal to or below its low limit (
comparison).
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