參數(shù)資料
型號： NCT7491RQR2G
廠商： ON Semiconductor
文件頁數(shù)： 19/80頁
文件大?。?/td> 844K
描述： IC REMOTE THERMAL MONITOR 24QSOP
標準包裝： 2,500
系列： *
NCT7491
http://onsemi.com
19
The PECI Configuration 5 register (address 0xEA)
enables the generic block and allows the command to be
executed. The configuration bits are:
" AW, bit 1
" PEX, bit 2
Setting AW to 1 indicates that the transfer is an Assured
Write transaction.
Setting PEX to 1 causes the NCT7491 to execute the
command that has been set up in the generic command
block. This bit will automatically clear when the transaction
has completed.
If a communication error occurs when a Generic PECI
command is sent then the GCOMM status bit is set. This bit
can be masked.
" GCOMM, register 0x81 <2>
" GCOMM mask, register 0x83 <2>
SMBus Compatible Master Port
Thermal data is gathered from temperature monitoring
devices attached to the SMBus Master port on the NCT7491.
This port is used to automatically read temperature data
from DIMM sensors, the PCH chipset sensor, graphics
thermal sensors, or any thermal sensor with an SMBus
interface. Up to 8 thermal slave devices are supported on the
SMBus master port. The SMBus slave address for each
device is user programmable. The register address of the
thermal data within the slave device is also user
programmable. This is assumed to be a 1byte address so
devices with a register address range of 0x00 to 0xFF are
suitable. Each slave device has associated programmable
configuration bits to indicate the protocol required to
communicate over the SMBus and the temperature data
format returned by the slave device. Status bits will indicate
if any checksum errors arise from communicating with the
slave devices.
The NCT7491 can be connected to the SMLINK1 port of
the PCH to allow the PCH thermal data to be read. Data is
automatically read from the PCH using the SMBus Block
Read protocol. The device can be configured to read the
DIMM temperature registers from the PCH.
The SMBus master and slave ports on the NCT7491 can
be connected together if required.
Temperature readings returned from the thermal devices
on the SMBus master port are available for use in the
Automatic Fan Control algorithm.
The SMBus thermal devices have associated high and low
temperature limit registers to allow outoflimit conditions
to be detected. If the SMBus Master interface is disabled
then the SMBus master is internally connected to the slave
interface, if the pins have not been assigned to GPIO
functions. Enabling the SMBus master port overrides any
GPIO1/GPIO2 configuration settings.
SMBus Compatible Master Registers
The registers relating to the control of the SMBus
compatible master interface are as follows:
Enabling the SMBus Master port:
" SMBus Master Enable, 0xB5 bit 0
Setting this bit configures pins 5 and 6 on the QSOP
package, or pins 2 and 3 on the QFN package as the SMBus
Master Port. It also enables the Thermal slave temperature
monitoring loop which will gather data from the devices
configured in the SMBus Master Addressing table.
When this bit is 0 and pins 5 and 6 on the QSOP package,
or pins 2 and 3 on the QFN package are not configured as
GPIOs then the SMBus slave port is internally connected to
the SMBus master port. This allows the master connected to
the NCT7491 to communicate directly with devices that are
on the NCT7491 master port.
Temperature Addressing Table:
" Device0 Address, 0x98
" Device0 Pointer, 0x99
" Device1 Address, 0x9A
" Device1 Pointer, 0x9B
" Device2 Address, 0x9C
" Device2 Pointer, 0x9D
" Device3 Address, 0x9E
" Device3 Pointer, 0x9F
" Device4 Address, 0xA0
" Device4 Pointer, 0xA1
" Device5 Address, 0xA2
" Device5 Pointer, 0xA3
" Device6 Address, 0xA4
" Device6 Pointer, 0xA5
" Device7 Address, 0xA6
" Device7 Pointer, 0xA7
The DeviceX Address register sets the 7bit (R/W bit not
included) SMBus address of the thermal sensor.
The DeviceX Pointer register sets the register address of
the temperature data in the thermal slave device.
Device0 can be used for SMBus Block Read commands.
In that case the block read command code should be written
to the Device0 Pointer register. If the NCT7491 Master port
is connected to the SMLINK1 port of the Intel PCH then the
PCH temperature (and possibly the DIMM temperatures)
can be read from this port. In that case Device0 should be
reserved for the PCH temperature and Device1 to Device 4
reserved for DIMM0 to DIMM3.
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