參數(shù)資料
型號(hào)： NCT7491RQR2G
廠商： ON Semiconductor
文件頁(yè)數(shù)： 32/80頁(yè)
文件大?。?/td> 844K
描述： IC REMOTE THERMAL MONITOR 24QSOP
標(biāo)準(zhǔn)包裝： 2,500
系列： *
NCT7491
http://onsemi.com
32
THERM Assertion
Pins 14, 19 and 22 on the QSOP package, or pins 11, 16
and 19 on the QFN package can be configured as THERM
I/O pins. These are opendrain active low pins used to signal
that a critical temperature limit has been exceeded. If a
temperature measurement exceeds its associated THERM
limit (or Tcontrol limit for PECI) then the THERM pin will
assert low. THERM assertion can be enabled or disabled for
each thermal measurement channel. PWM outputs can be
configured to respond to THERM assertions. By default
THERM assertion will cause the PWM outputs to go to
100% duty cycle for fail safe cooling. This can be
individually disabled for each PWM output. THERM
assertion behavior can be modified so that the outputs do not
immediately go to 100% when THERM asserts. If this
function is enabled then an associated temperature step
register is used to increase the PWM duty in steps. For
example, if the step register is set to 4 degrees then the PWM
output will go to PWMStep1 at the THERM limit, to
PWMStep2 at THERM+4 and 100% at THERM+2x4,
where PWMStep1 and PWMStep2 are programmable
PWM levels.
THERM Pin Configuration
Configuring Pin 14 (QSOP), Pin 11 (QFN) as a THERM pin:
Setting bits <1:0> of register 0x7D to <01> sets pin 14 on the
QSOP package or pin 11 on the QFN package as a THERM
pin.
Configuring Pin 19 (QSOP), Pin 16 (QFN) as a THERM pin:
Setting bits <3:2> of register 0x7C to <01> sets pin 19 on the
QSOP package or pin 16 on the QFN package as a THERM
pin.
Configuring Pin 22 (QSOP), Pin 19 (QFN) as a THERM pin:
Setting bit 1 of register 0x78 to 1 enables pin 22 on the QSOP
package or pin 19 on the QFN package as a THERM pin.
THERM/Tcontrol Limit Registers
" Remote1 THERM Limit, 0x6A
" Local THERM Limit, 0x6B
" Remote2 THERM Limit, 0x6C
" PECI0 Tcontrol Limit,  0x3D
" PECI1 Tcontrol Limit, 0x08
" PECI2 Tcontrol Limit, 0x09
" PECI3 Tcontrol Limit, 0x0A
" SMBus Device THERM Limit, 0xC3 (applies to all
SMBus devices)
" Push temperature THERM Limit, 0xD0 (applies to all
Push channels)
If any temperature channel exceeds its associated
THERM limit then a status bit will be set to indicate the
condition. If that channel is enabled for pin assertions and a
THERM pin has been configured then the pin will assert. If
the temperature value goes below its THERM limit then the
status bit will automatically clear and the pin will deassert.
" If Offset64 mode is enabled then
Remote1/Local/Remote2 THERM limits should be
programmed in that format. Otherwise those limits
should be programmed as 2s complement values.
" If PECI Absolute mode is enabled than PECI Tcontrol
limits should be programmed as unsigned values,
otherwise they should be programmed as 2s
complement values.
" SMBus THERM limit should be programmed as an
unsigned value.
" Push THERM limit should be programmed as a 2s
complement value.
THERM Status Bits
" PECI Tcontrol status bits = 0x89 <3:0>
" Remote1 THERM status bit = 0x89 <4>
" Local THERM status bit  = 0x89 <5>
" Remote2 THERM status bit = 0x89 <6>
" SMBus slave THERM status bits = 0xBB <7:0>
" Push THERM status bits = 0x7E <7:4>
Enabling THERM/Tcontrol Assertions for the
Temperature Channels
" Set 0x7C bit 4 to 1 to enable PECI T
CONTROL
 pin
assertions
" Set 0x7C bit 5 to 1 to enable Remote1 THERM pin
assertions,
" Set 0x7C bit 6 to 1 to enable Local THERM pin
assertions,
" Set 0x7C bit 7 to 1 to enable Remote2 THERM pin
assertions,
" Set 0x16 bit 5 to 1 to enable Push temperature THERM
pin assertions,
" Set 0x16 bit 6 to 1 to enable SMBus slave THERM pin
assertions
PECI T
CONTROL
 enable bit applies to all PECI channels
Push temperature THERM enable applies to all Push
channels
SMBus slave enable bit applies to all SMBus channels
The user should also ensure that the THERM Disable bit,
0x7D <2>, is 0. This is the THERM disable bit and when set
to 1 will disable all THERM pin assertions.
Enabling the PWM Response to THERM Assertions
" PWM1 responds to THERM, 0x17 bit 0
" PWM2 responds to THERM, 0x17 bit 1
" PWM3 responds to THERM, 0x17 bit 2
If these bits are set to 1 then the associated PWM output
will be affected by a THERM assertion. There are 3 possible
responses: go to 100%, go to Maximum PWM or implement
the THERM Stepping function.
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