參數(shù)資料
型號: MN89305
廠商: PANASONIC CORP
元件分類: 顯示控制器
英文描述: 1024 X 768 PIXELS CRT OR FLAT PNL GRPH DSPL CTLR, PQFP144
封裝: 20 X 20 MM, PLASTIC, LQFP-144
文件頁數(shù): 5/42頁
文件大小: 444K
代理商: MN89305
LSIs for Display
MN89305
13
s Pin Descriptions (continued)
4) Memory Access Related Pins (continued)
Pin Name
I/O
Level
Function
WE
#
O
Write enable
Data write signal
MD[31 : 0]
I/O
CMOS
Memory data bus
These lines are a 32-bit bus for DRAM, and can be switched to function as a 16-
bit bus by setting control register values.
This data bus is also used for video BIOS reads when a PCI bus connection is
used. In that case, the MD[15:0] lines are used as the BIOS ROM address and the
MD[23:16] lines are used as the BIOS ROM data inputs.
5) LCD Related Pins
Pin Name
I/O
Level
Function
BACKON
I/O
CMOS
Back light on
Outputs a signal that requests that the backlight be turned on.
Low: Backlight off
High: Backlight on
This pin can also be used as a general-purpose I/O port.
In external RAMDAC mode, this pin is set to the output state and is used as the
register write signal to the RAMDAC.
LCDON
I/O
CMOS
LCD drive power supply on
Outputs a signal that requests that the LCD panel drive power supply be turned on.
Low: LCD drive power supply off
High: LCD drive power supply on
This pin can also be used as a general-purpose I/O port.
In external RAMDAC mode, this pin is set to the output state and is used as the
register address bit 0 signal to the RAMDAC.
LOGICON
I/O
CMOS
LCD logic power supply on
Outputs a signal that requests that the LCD panel logic system power supply be
turned on.
Low: LCD logic system power supply off
High: LCD logic system power supply on
This pin can also be used as a general-purpose I/O port.
In external RAMDAC mode, this pin is set to the output state and is used as the
register address bit 1 signal to the RAMDAC.
LP
O
Latch pulse
Pulse output that indicates the latch timing for one line of data for an STN LCD
panel. This output is used as the horizontal synchronizing signal when a TFT
LCD panel is used or in external RAMDAC mode.
FP
O
Frame pulse
Pulse output that indicates the frame start for an STN LCD panel. This output is
used as the vertical synchronizing signal when a TFT LCD panel is used or in
external RAMDAC mode.
相關PDF資料
PDF描述
MN89306 800 X 600 PIXELS CRT OR FLAT PNL GRPH DSPL CTLR, PQFP128
MP1322-017LF 50 V, SILICON, PIN DIODE
MP4212 5 A, 60 V, 0.32 ohm, 2 CHANNEL, N AND P-CHANNEL, Si, POWER, MOSFET
MP4212 5 A, 60 V, 0.32 ohm, 4 CHANNEL, N AND P-CHANNEL, Si, POWER, MOSFET
MP6404 5 A, 60 V, 0.32 ohm, 6 CHANNEL, N AND P-CHANNEL, Si, POWER, MOSFET
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