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參數(shù)資料
| 型號： | MESC-ST1 |
| 廠商： | Lineage Power |
| 英文描述： | Enhanced Services Controller，Statistics Monitor - 65535 Connections(可統(tǒng)計(jì)檢測65535個連接的增強(qiáng)型服務(wù)控制器) |
| 中文描述： | 增強(qiáng)服務(wù)控制器，統(tǒng)計(jì)監(jiān)測- 65535連接（可統(tǒng)計(jì)檢測65535個連接的增強(qiáng)型服務(wù)控制器） |
| 文件頁數(shù)： | 20/31頁 |
| 文件大小： | 182K |
| 代理商： | MESC-ST1 |
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August 2000
MESC_ST1
MACRO
Data Sheet
Logic Design Solutions
20/28
1.6.2.6
IE Read_Reset_FIFO Register
Address = 0100\h.
Read only.
This register enables the CPU to read all the statistics processed in the IE_SDRAM.
The user should accesses this register after the Read_IE_SDRAM Command has been completed.
BIT
15..0
31:16
DESCRIPTION
Statistics data.
Not used.
This register accesses one FIFO where all the IE_SDRAM statistics have been written.
When the Read_IE_SDRAM Command has been completed, the several access to this register will provide in a specific order
the following statistics :
-
-
-
-
-
-
-
-
-
-
-
-
1
st
read : Minimum Period low 16-bits data
2
nd
read : Minimum Period high 16-bits data
3
rd
read : Maximum Period low 16-bits data
4
th
read : Maximum Period high 16-bits data
5
th
read : Contract SCR low 16-bits data
6
th
read : Contract SCR high 16-bits data
7
th
read : Previous Violation time low 16-bits data
8
th
read : Previous Violation time high 16-bits data
9
th
read : SCR Violation 16-bits data
10
th
read : Contract PCR low 16-bits data
11
th
read : Contract PCR high 16-bits data
12
th
read : Maximum Burst size 16-bits data
The user should not forget all these statistics are CLP dependant. So to get the complete information, two Read_IE_SDRAM
Command have to be generated for one Channel number. One command with CLP=0 and one command with CLP=1.
1.6.2.7
One Second Register.
Address = 0104\h.
Read / Write.
This register enables the CPU to run one second counter. This counter helps to generate the Ingress Sustained Cell Rate
counter (e_stat_2).
BIT
0
DESCRIPTION
1 : Run one second counter
0 : one second done.
Not used.
31:1
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