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參數(shù)資料
| 型號： | MESC-ST1 |
| 廠商： | Lineage Power |
| 英文描述： | Enhanced Services Controller，Statistics Monitor - 65535 Connections(可統(tǒng)計檢測65535個連接的增強型服務(wù)控制器) |
| 中文描述： | 增強服務(wù)控制器，統(tǒng)計監(jiān)測- 65535連接（可統(tǒng)計檢測65535個連接的增強型服務(wù)控制器） |
| 文件頁數(shù)： | 18/31頁 |
| 文件大小： | 182K |
| 代理商： | MESC-ST1 |
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August 2000
MESC_ST1
MACRO
Data Sheet
Logic Design Solutions
18/28
Inactivate one channel in E_SDRAM and in IE_SDRAM:
-
write in VCX_CLP Register the channel number concerned, for example 0000 1111\h. (CLP must be 0)
-
write in Data Register FFFF FFFF\h.
-
write in E_IE_Command Register 0000 0011\h
Activate one channel in E_SDRAM and in IE_SDRAM:
-
write in VCX_CLP Register the channel number concerned, for example 0000 2222\h. (CLP must be 0)
-
write in Data Register 2222 2222\h.
-
write in E_IE_Command Register 0000 0033\h
Write Contract_SCR in IE_SDRAM:
-
write in VCX_CLP Register the channel number concerned, for example 0000 3333\h. (CLP=0)
-
write in Data Register the Contract SCR value : 0001 0002\h.
-
write in IE_Command Register 0000 0005\h
Write Contract_SCR in IE_SDRAM:
-
write in VCX_CLP Register the channel number concerned, for example 0001 4444\h. (CLP=1)
-
write in Data Register the Contract SCR value : 0004 0003\h.
-
write in E_IE_Command Register 0000 0007\h
Read Statistics of one Channel from IE_SDRAM:
-
write in VCX_CLP Register the channel number concerned, for example 0000 5555\h. (CLP=0)
-
write in E_IE_Command Register 0000 0009\h
-
When E_IE_Command Register bit 0 = 0\b, the CPU can read the statistics value and/or run the Reset Statistics
command.
Reset Statistics of one Channel from IE_SDRAM:
-
write in VCX_CLP Register the channel number concerned, for example 0000 5555\h. (CLP=0)
-
write in E_IE_Command Register 0000 000B\h
Read and Reset one Statistic of one Channel from E_SDRAM:
-
write in VCX_CLP Register the channel number concerned, for example 0000 5555\h. (CLP=0)
-
write in E_IE_Command Register 0000 0150\h to specify e_stat_2
-
When E_IE_Command Register bit 4 = 0\b, the CPU can read the statistic value.
The E_SDRAM and IE_SDRAM command management shares the VCX_CLP register and the DATA Register. Thus the
activate and inactivate command can be executed in same time for the E_SDRAM and for the IE_SDRAM.
Before writing any command in the E_IE_Command Register the CPU must check if E_IE_Command_Register_bit_0 and/or
bit_4 = 0.
When the bit_0 and/or bit_4= 0, it means the previous command has been processed. If the bit_0 and/or bit_4= 1, it means the
previous command is still in process.
The Contract SCR and PCR keep their current value during a Reset IE_SDRAM Statistic Command. There are not resetted or
modified.
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