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參數(shù)資料
| 型號： | MESC-ST1 |
| 廠商： | Lineage Power |
| 英文描述： | Enhanced Services Controller，Statistics Monitor - 65535 Connections(可統(tǒng)計檢測65535個連接的增強(qiáng)型服務(wù)控制器) |
| 中文描述： | 增強(qiáng)服務(wù)控制器，統(tǒng)計監(jiān)測- 65535連接（可統(tǒng)計檢測65535個連接的增強(qiáng)型服務(wù)控制器） |
| 文件頁數(shù)： | 11/31頁 |
| 文件大?。?/td> | 182K |
| 代理商： | MESC-ST1 |
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August 2000
MESC_ST1
MACRO
Data Sheet
Logic Design Solutions
11/28
1.4.3.1
Architecture of the third set
The process of the third set of statistics
is done with the help of the E_SDRAM. The E_SDRAM holds all the
neccessary data fields for all the 65535 Channels for CLP 0 and CLP 1. The E_SDRAM is used also as a connection
memory to identify which channel is processed.
During one timeslot (680 ns) all the statistics update of one channel is done and the read reset of the statistic of another
channel is also done.
When one match happen between the E.S.I. bus and the Connection Memory on a particular channel, all the statistic counters
of this channel are updated according E.S.I. data.
If one statistic counter roll over, one interruption is generated and one status interrupt register is updated to inform the CPU.
To reset all the statistic counters associated to one channel, the CPU should run one read_reset command of the statistic
counters.
The E_SDRAM address memory is organised as the following :
22 downto 7
IE_VCX field
or
EE_VCX field
or
ED_VCX field
Coming from
E.S.I. bus
Or from VCX_CLP
Register.
6 downto 5
4
3 downto 0
0000\h to FFFE\h.
Gives 65535 possible
Channels.
Fixed to ‘00’
CLP field
coming from
E.S.I. bus
Or from VCX_CLP
Register.
0 or 1.
0000 : Channel number, 0000\h to FFFE\h.
0001 : e_stat_0_low
0010 : e_stat_0_high
0011 : e_stat_2
0100 : e_stat_3 IE_VCX dependant
0101 : e_stat_4
Set 1
0110 : e_stat_5
0111 : e_stat_6
1000 : e_stat_7
1001 : e_stat_1_low ED_VCX dependant
1010 : e_stat_1_high
Set 2
E.S.I. bus
CPU_Write
65535 Channels
E
SDRAM
CPU_Read
Irq_ovf
REG_RD_RESET
FIFO_IN
FIFO_OUT
STAT.
UPDATE
LOGIC
INTERFACE
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