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參數(shù)資料
| 型號： | MC68HC05JB4DWR2 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁數(shù)： | 79/134頁 |
| 文件大?。?/td> | 1305K |
| 代理商： | MC68HC05JB4DWR2 |
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February 24, 1999
GENERAL RELEASE SPECIFICATION
MC68HC05JB4
INPUT/OUTPUT PORTS
MOTOROLA
REV 2
7-3
7.2.2 Port-A Data Direction Register
7.2.3 Port-A Pull-up Control Register
7.3
PORT-B
Port-B is a 5-bit bi-directional port. The port-B data register is at $0001 and the
data direction register (DDRB) is at $0005. Reset does not affect the data regis-
ters, but clears the data direction registers, thereby returning the port pins to
inputs. Writing a ‘one’ to a DDR bit sets the corresponding port bit to output mode.
Each pin in Port-B has an internal pull-up resistor (50k
typical) which can be
individually enabled by writing a ‘1’ to the corresponding bit in the Port-B pull-up
control register at location $0011.
All Port-B pins have built in Slow Output edge transition driver which can be
enabled by writing a ‘1’ to bit-6 of Port-B data direction register at location $0005.
When PB0 is congured as an input, it also serves as the input capture pin for the
16-bit Timer. When congured as output, the input to the input capture will be per-
manently tied “l(fā)ow” and no input capture can be generated. PB0 has built-in
schmitt triggered input to improve noise immunity.
PB3 and PB4 also serve as extra ADC inputs, AD4 and AD5. When a port pin is
selected as ADC input and the ADON bit is set to ‘1’, the pin will be congured as
input pin and its pull-up will be disabled automatically regardless of the status of
the DDR-bit. The value of the DDR-bit will not be affected.
If the pull-up device is enabled and the port pin is congured as output, the output
port becomes an open-drain output with 50k
pull-up.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
DDRA
R
DDRA7
DDRA6
DDRA5
DDRA4
DDRA3
DDRA2
DDRA1
DDRA0
$0004
W
reset:
00000000
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
PURA
R
$0010
W
PURA7
PURA6
PURA5
PURA4
PURA3
PURA2
PURA1
PURA0
reset:
00000000
Port-B PURX
Port-B DDRX
Pin Configuration
0
Input
0
1
Output Push/Pull
1
0
Input with 50k pull-up
1
Open-drain Output with 50k pull-up
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