參數(shù)資料
型號: MC68HC05JB4DWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁數(shù): 6/134頁
文件大?。?/td> 1305K
代理商: MC68HC05JB4DWR2
February 24, 1999
GENERAL RELEASE SPECIFICATION
MC68HC05JB4
ANALOG TO DIGITAL CONVERTER
MOTOROLA
REV 2
11-5
11.4
ADC DURING LOW POWER MODES
The ADC continues normal operation in WAIT mode. To reduce power consump-
tion in WAIT mode, the ADON and ADRC bits in the ADSCR should be cleared if
the ADC is not used. If the ADC is in use and the internal bus clock is above
1MHz, it is recommended that the ADRC bit be cleared.
In STOP mode, the ADC stops operation.
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