- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98012 > MC68HC05JB4DWR2 (MOTOROLA INC) 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PDSO28 PDF資料下載
參數(shù)資料
| 型號： | MC68HC05JB4DWR2 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁數(shù)： | 67/134頁 |
| 文件大?。?/td> | 1305K |
| 代理商： | MC68HC05JB4DWR2 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁當前第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁
GENERAL RELEASE SPECIFICATION
February 24, 1999
MOTOROLA
INTERRUPTS
MC68HC05JB4
4-8
REV 2
NOTE
The BIH and BIL instructions will only apply to the level on the IRQ pin itself, and
not to the output of the logic OR function with the PA0 to PA3 pins. The state of the
individual Port A pins can be checked by reading the appropriate Port A pins as
inputs.
NOTE
If enabled, the PA0 to PA3 pins will cause an IRQ interrupt only when the
corresponding pin is congured as input.
4.5.5 Timer1 Interrupt (TIMER1)
The TIMER1 interrupt is generated by the 16-bit timer when either an overow or
an input capture or output compare has occurred as described in the section on
16-bit timer. The interrupt ags and enable bits for the Timer1 interrupts are
located in the Timer1 Control & Status Register (TSR) located at $0012, $0013.
The I-bit in the CCR must be clear in order for the TIMER1 interrupt to be enabled.
Either of these three interrupts will vector to the same interrupt service routine
located at the address specied by the contents of memory locations $1FF6 and
$1FF7.
4.5.6 USB Interrupt (USB)
The USB interrupt is generated by the USB module as described in the section on
Universal Serial Bus. The interrupt enable bits for the USB interrupt are located at
bit3-bit2 of UIR0 REG and bit3-bit2 of UIR1 REG. Also Once the device goes into
Suspend Mode, any bus activities will cause the USB to generate an interrupt to
CPU to come out from the Suspend mode. The I-bit in the CCR must be clear in
order for the USB interrupt to be enabled. Either of these two interrupts will vector
to the same interrupt service routine located at the address specied by the con-
tents of memory locations $1FF8 and $1FF9.
4.5.7 MFT Interrupt (MFT)
The MFT interrupt is generated by the MFT module as described in the section on
Multi-function Timer. These interrupts will vector to the same interrupt service rou-
tine located at the address specied by the contents of memory locations $1FF4
and $1FF5.
相關PDF資料 |
PDF描述 |
|---|---|
| MC68HC705JB4DWR2 | 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDSO28 |
| MC68HC05L11PU | 8-BIT, MROM, 3.69 MHz, MICROCONTROLLER, PQFP100 |
| MC68HC05P7P | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP28 |
| MC68HC05SB7 | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| MC68HC705SB7 | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05JJ6 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification Microcontrollers |
| MC68HC05JJ6CDW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification Microcontrollers |
| MC68HC05JJ6CDWE | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification Microcontrollers |
| MC68HC05JJ6CP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification Microcontrollers |
| MC68HC05JJ6CPE | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification Microcontrollers |
發(fā)布緊急采購，3分鐘左右您將得到回復。