參數(shù)資料
型號(hào): MC68HC05JB4DWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁(yè)數(shù): 68/134頁(yè)
文件大?。?/td> 1305K
代理商: MC68HC05JB4DWR2
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February 24, 1999
GENERAL RELEASE SPECIFICATION
MC68HC05JB4
RESETS
MOTOROLA
REV 2
5-1
SECTION 5
RESETS
This section describes the six reset sources and how they initialize the MCU. A
reset immediately stops the operation of the instruction being executed, initializes
certain control bits, and loads the program counter with a user dened reset vec-
tor address. The following conditions produce a reset:
Initial power up of device (power on reset).
A logic zero applied to the RESET pin (external reset).
Timeout of the COP watchdog (COP reset).
Low voltage applied to the device (LVR reset).
Fetch of an opcode from an address not in the memory map (illegal
address reset).
Detection of USB reset signal (USB reset).
Figure 5-1 shows a block diagram of the reset sources and their interaction.
Figure 5-1. Reset Sources
RESET
LATCH
R
COP WATCHDOG
POWER-ON RESET
ILLEGAL ADDRESS RESET
INTERNAL
D
INTERNAL
CLOCK
S
RST
TO CPU
AND
LOW VOLTAGE RESET
VDD
SUBSYSTEMS
ADDRESS BUS
USB RESET DETECTION
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