參數(shù)資料
型號: MC68HC05JB4DWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁數(shù): 77/134頁
文件大?。?/td> 1305K
代理商: MC68HC05JB4DWR2
February 24, 1999
GENERAL RELEASE SPECIFICATION
MC68HC05JB4
INPUT/OUTPUT PORTS
MOTOROLA
REV 2
7-1
SECTION 7
INPUT/OUTPUT PORTS
In normal operating mode there are 19 usable bidirectional I/O lines arranged as
one 8-bit I/O port (Port-A), one 5-bit I/O port (Port-B), and one 6-bit I/O port
(Port C). The individual bits in these ports are programmable as either inputs or
outputs under software control by the data direction registers (DDRs).
Each pin on Port-A and Port-B has individual internal pull-up resistor (50k
typi-
cal) which can be enabled by software. In addition, port pins PA6, PA7, and all
port-B pins have built in Slow Falling Edge transition feature. This software select-
able feature helps to eliminate EMI noise.
Other functions such as high current drive, interrupt, are available on some port
pins via mask option.
7.1
SLOW FALLING-EDGE OUTPUT DRIVER
When enabled, the slow falling-edge output drive feature has a slow falling edge
(drops from 5.0V to 2.2V in 167ns typically, with 50pF load) followed by a fast tran-
sition to Vss. The fast transition duration is depending on the strength of the output
driver dened for each port.
Figure 7-1. Slow Falling-edge Output Driver
50pF
5.0V
165ns
330ns
2.2V
Output Driver
0V
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