- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371016 > MC145572 (Motorola, Inc.) ISDN U-Interface Transceiver(ISDN U接口收發(fā)器) PDF資料下載
參數(shù)資料
| 型號(hào)： | MC145572 |
| 廠商： | Motorola, Inc. |
| 英文描述： | ISDN U-Interface Transceiver(ISDN U接口收發(fā)器) |
| 中文描述： | 綜合業(yè)務(wù)數(shù)字網(wǎng)U型接口收發(fā)器（綜合業(yè)務(wù)數(shù)字網(wǎng)ü接口收發(fā)器） |
| 文件頁(yè)數(shù)： | 69/264頁(yè) |
| 文件大?。?/td> | 2832K |
| 代理商： | MC145572 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)當(dāng)前第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)第207頁(yè)第208頁(yè)第209頁(yè)第210頁(yè)第211頁(yè)第212頁(yè)第213頁(yè)第214頁(yè)第215頁(yè)第216頁(yè)第217頁(yè)第218頁(yè)第219頁(yè)第220頁(yè)第221頁(yè)第222頁(yè)第223頁(yè)第224頁(yè)第225頁(yè)第226頁(yè)第227頁(yè)第228頁(yè)第229頁(yè)第230頁(yè)第231頁(yè)第232頁(yè)第233頁(yè)第234頁(yè)第235頁(yè)第236頁(yè)第237頁(yè)第238頁(yè)第239頁(yè)第240頁(yè)第241頁(yè)第242頁(yè)第243頁(yè)第244頁(yè)第245頁(yè)第246頁(yè)第247頁(yè)第248頁(yè)第249頁(yè)第250頁(yè)第251頁(yè)第252頁(yè)第253頁(yè)第254頁(yè)第255頁(yè)第256頁(yè)第257頁(yè)第258頁(yè)第259頁(yè)第260頁(yè)第261頁(yè)第262頁(yè)第263頁(yè)第264頁(yè)
MC145572
4–33
MOTOROLA
Internal Analog Loopback
When this bit is set to 1, the analog loopback path is inside the MC145572. Default after any reset
is 0 or external analog loopback path.
Line Connect
When this bit is 1, the U–interface line can remain connected during analog loopbacks. When this
bit is 0, the line must be disconnected. Default after any reset is 0.
TSEN DCH Enable
This bit enables TSEN when D channel data is present on the Dout or DCHout pins. When the
timeslot assigner is enabled, the TSEN signal is active during the timeslot which D channel data is
transferred.
IDL2 Rate 2
In the IDL2 mode, when IDL2 rate 2 is set to 1, the IDL2 clock (DCL) rate is 512 kHz. IDL2 clock
speed (see Register BR7) is ignored when this bit is set to 1. In full GCI mode, as a master in the
NT mode, the DCL clock rate is selected using the pin input (see CLKSEL description in
Section 3.3.4
).
This bit also sets the clock frequency on FREQREF or FREFout when in NT Slave mode.
IDL2 Long Frame Mode
While operating as an IDL2 master, this bit controls whether the FSR and FSX operate in Long Frame
or Short Frame mode. If this bit is 1, both FSR and FSX operate in Long Frame mode. As an IDL2
slave, the MC145572 determines the mode based on the length of FSR. See
Section 5.4.2.
crc
Corrupt Mode
This bit changes the operating mode of the input control bit
crc
Corrupt in register BR8. When
crc
Corrupt mode is set to 1, the
crc
Corrupt input is used to only corrupt one outgoing superframe
crc
.
When
crc
Corrupt mode is set to 0, the
crc
Corrupt behaves as it did in the MC145472, unaligned
to the transmit superframe, and continues to affect the
crc
data until explicitly reset.
febe
/
nebe
Rollover
This bit changes the operating mode of the
febe
and
nebe
counter registers BR4 and BR5. When
febe
/
nebe
rollover is set to 1, the
febe
and
nebe
counter registers do not saturate at all 1s, but
instead, rollover from $FF to $00. When
febe
/
nebe
rollover is set to 0, the
febe
and
nebe
counter
registers behave just as they do in the MC145472.
M4 Trinal Mode
This bit changes the operating mode of the persistence checking performed on the
act
,
dea
,
sai
,
and
uoa
bits in the deframer. When M4 Trinal mode is set to 1, the checked M4 bits must be valid
for three consecutive superframes before asserting Verified
act
, or Verified
dea
, etc. When M4 Trinal
mode is set to 0, the checked M4 bits behave as they did in the MC145472, only checking them as
configured in BR9(b5,b4). When operating in full GCI mode, the MC145572 performs trinal checks
on the received M4 channel
act
,
dea
,
sai
, and
uoa
bits (see Table 4–11).
This register is used to control the dump/restore operation, SFAX and SFAR outputs, and three–state
enable for off–chip bus drivers. After a hardware or software reset, all bits default to 0 to maintain
MC145472/MC14LC5472 compatibility.
b7
D/R
Mode 1
b6
D/R
Mode 0
b5
b4
b3
b2
b1
b0
OR8
SFAX
Output
Enable
FREQREF
Output
Enable
TSEN
BCH
Enable
Reserved
SFAX/
SFAR
Enable
D Channel
Port
Enable
rw
rw
rw
rw
rw
rw
rw
rw
CAUTION
Reserved bit b2 must be set to 0 at all times.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC145576 | ISDN NT1(ISDN 網(wǎng)絡(luò)終端) |
| MC14557BCL | 1-to-64 Bit Variable Length Shift Register |
| MC14557BFEL | 1-to-64 Bit Variable Length Shift Register |
| MC14557BDWR2 | RJZ Series - Econoline Unregulated DC-DC Converters; Input Voltage (Vdc): 09V; Output Voltage (Vdc): 12V; Power: 2W; 2W Single and Dual Outputs in DIP 14; 3kVDC and 4kVDC Isolation; Optional Continuous Short Circuit Protected; Custom Solutions Available; UL94V-0 Package Material; Efficiency up to 85% |
| MC14557 | 1-to-64 Bit Variable Length Shift Register |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC145572AAC | 功能描述:IC TRANSCEIVER ISDN 44-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| MC145572ACR2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Freescale Semiconductor 功能描述: |
| MC145572AEI | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Freescale Semiconductor 功能描述: |
| MC145572AFN | 功能描述:IC TRANSCEIVER ISDN 44-PLCC RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| MC145572APB | 功能描述:IC ISDN INTERFACE TXCVER 44-LQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。