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參數(shù)資料
| 型號： | MC145572 |
| 廠商： | Motorola, Inc. |
| 英文描述： | ISDN U-Interface Transceiver(ISDN U接口收發(fā)器) |
| 中文描述： | 綜合業(yè)務(wù)數(shù)字網(wǎng)U型接口收發(fā)器（綜合業(yè)務(wù)數(shù)字網(wǎng)ü接口收發(fā)器） |
| 文件頁數(shù)： | 50/264頁 |
| 文件大?。?/td> | 2832K |
| 代理商： | MC145572 |
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MC145572
4–14
MOTOROLA
a 0 for two consecutive superframes. This bit is updated at the end of the first frame of each super-
frame and is provided in this register for status only. See BR9(b5:b4) for more information regarding
this bit. When OR7(b0) is set, the M4
act
and
dea
bits must be valid for three superframes before
Verified
act
or Verified
dea
are updated.
Verified
dea
This is the dual–consecutively checked, inverted setting of the
dea
bit, in the received superframe.
Since the
dea
bit can only be received by an NT, this bit can only be 1 in the LT mode. Dual–consecutive
checking requires that the received bit is in the same state for two consecutive superframes. Whenever
the U–interface transceiver detects a transition from 0 to 1 on Superframe Sync in NR1(b1), Verified
dea
is set to 0. It remains in its current state until both Superframe Sync (NR1(b1)) and Linkup
(NR1(b3)) are 1s. Then, if the received
dea
bit is 0 for two consecutive superframes, Verified
dea
will become 1. After Verified
dea
becomes 1, if the received
dea
bit is ever 1 for two consecutive
superframes, then Verified
dea
will become a 0. This bit is updated at the end of the second basic
frame of each superframe and is provided in this register for status only. See BR9(b5:b4) for more
information regarding this bit. When OR7(b0) is set, the M4
dea
bit must be valid for three superframes
before Verified
dea
is updated.
Superframe Detect
This is the unmodified output of the Superframe Deframer’s superframe detection circuit. It is primarily
intended for diagnostic purposes.
febe
This register contains the current
febe
count. The counter is not cleared by a software or hardware
reset. The register can be preset to any value by writing to it. If the
febe
bit is active in a superframe,
the counter will increment at the end of the received superframe. The counter will not increment unless
Superframe Sync (NR1(b1)) and Linkup (NR1(b3)) are both 1s. If OR7(b1) is set, then the
febe
counter
will roll over from $FF to $00. The user software must take into account that if OR7(b1) is set, the
counter value read from BR4 might be less than the previous value, which means that the counter
has rolled over. The default setting for OR7(b1), after any hardware or software reset, produces the
same operation as the MC145472/MC14LC5472. This register is replaced by Register OR4 when
BR10(b0) = 1. When OR7(b1) is cleared, BR4 counts to $FF and does not roll over. This is the default
configuration after any reset to maintain MC145472 compatibility.
b7
b6
b5
b4
b3
b2
b1
b0
BR4
febe
Counter 7
febe
Counter 6
febe
Counter 5
febe
Counter 4
febe
Counter 3
febe
Counter 2
febe
Counter 1
febe
Counter 0
rw
rw
rw
rw
rw
rw
rw
rw
nebe
This register contains the current
nebe
count. A
nebe
occurs whenever the received
crc
message
does not match the computed
crc
or when Linkup (NR1(b3)) is 1 and Superframe Sync (NR1(b1))
is 0. The Superframe Framer maintains the superframe timing to increment the
nebe
counter when
Superframe Sync is 0. The counter is not cleared by a software or hardware reset. The register can
be preset to any value by writing to it.
When the Superframe Deframer detects a
crc
error in the received superframe, the counter is increm-
ented at the end of that superframe. When OR7(b1) is set, then the
febe
counter rolls over from
$FF to $00. The user software must take into account that if OR7(b1) is set, the counter value read
from BR5 might be less than the previous value, which means that the counter has rolled over. The
default setting for OR7(b1), after any hardware or software reset, produces the same operation as
the MC145472/MC14LC5472. When BR10(b0) = 1, this register is replaced by Register OR5. When
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| MC145572AAC | 功能描述:IC TRANSCEIVER ISDN 44-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
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| MC145572AEI | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Freescale Semiconductor 功能描述: |
| MC145572AFN | 功能描述:IC TRANSCEIVER ISDN 44-PLCC RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| MC145572APB | 功能描述:IC ISDN INTERFACE TXCVER 44-LQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
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