參數(shù)資料
型號(hào)： MB86965A
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP16
封裝： PLASTIC, QFP-160
文件頁數(shù)： 20/76頁
文件大?。?/td> 394K
代理商： MB86965A
MB86965
27
Table 18. Collision Count
COLLISION
COUNT
16 COL
DLCR0<1>
COL CTR3
DLCR4<7>
COL CTR2
DLCR4<6>
COL CTR1
DLCR4<5>
COL CTR0
DLCR4<4>
COL DLCR0<2>
0
1
0
1
2
0
1
0
1
3
0
1
4
0
1
0
1
5
0
1
0
1
6
0
1
0
1
7
0
1
8
0
1
0
1
9
0
1
0
1
10
0
1
0
1
0
1
11
0
1
0
1
12
0
1
0
1
13
0
1
0
1
14
0
1
0
1
15
0
1
16
1
0
1
Table 18 shows details on collision counting.
Receive Mode Register
As shown in Table 19, this register contains six bits that
control receiver function, and one Receive Buffer status
bit. Status bit RX BUF EMPTY, DLCR5<6>, is
necessary to the software routine, which reads receive
packets from the buffer. It tells the host routine whether
there are any packets in the Receive Buffer that are
complete and ready-to-read. In a multitasking system,
this indicator would be used in conjunction with an
interrupt when RX PKT asserts, which means a packet
has arrived in memory. The interrupt would be used to
start the routine that reads packets from the buffer.
As this routine begins, the interrupt on RX PKT can be
disabled to prevent unneeded interrupts. After the first
packet is read from the buffer, the RX BUF EMPTY bit
would be read, to see if more packets have come in
(packets may, at times, arrive in bursts). If the buffer is not
empty, another packet would be read out, and this
procedure repeated until the buffer is empty. After
emptying the buffer, the host clears RX PKT, then
re-enables interrupts on RX PKT, checks the buffer status
one more time (because a packet can arrive at any time),
then exits to do other tasks. Note that the packet header
can reflect acceptance of a short packet (bytes 3 to 59).
Two of the control bits allow reception of packets with
certain types of errors. The ACPT BAD PKTS bit, when
set, causes the Receiver to retain and store in the buffer
packets with CRC, alignment or short-length errors,
provided that there was no indication of collision during
reception. Likewise, the ACPT SHORT PKTS bit, when
set, allows the retention of short packets down to and
including only six bytes in length, excluding Preamble
and CRC, provided that there was no indication of
collision during reception and no alignment or CRC
error.
Under normal operation, packets with less than 60 bytes,
the IEEE 802.3 lower limit, would be discarded. These
functions are provided for diagnostic purposes. Packets
are accepted only if both the address filter and error filter
are passed. Packets with no content errors, i.e., short,
alignment or CRC, are accepted without regard to
collision indications. Normally Node ID is six bytes,
except if RX SHORT ADDR bit DLCR5<4> is set high,
in which case only the first five bytes of the Node ID are
checked.
相關(guān)PDF資料
PDF描述
MB88151APNF-G-500-JNE1 OTHER CLOCK GENERATOR, PDSO8
MB88151APNF-G-401-JNEFE1 OTHER CLOCK GENERATOR, PDSO8
MB88151APNF-G-801-JNERE1 OTHER CLOCK GENERATOR, PDSO8
MB88151APNF-G-400-JNERE1 OTHER CLOCK GENERATOR, PDSO8
MB88151APNF-G-200-JNEFE1 OTHER CLOCK GENERATOR, PDSO8
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB86965B 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:EtherCoupler ETHERNET CONTROLLER WITH 10BASE?T TRANSCEIVER
MB86965BPF-G-BND 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:EtherCoupler ETHERNET CONTROLLER WITH 10BASE?T TRANSCEIVER
MB86967 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:LAN Controller with PC Card, ISA Bus, and General-purpose Bus Interfaces
MB86967PFV 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:LAN Controller with PC Card, ISA Bus, and General-purpose Bus Interfaces
MB86977 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IP PACKET FORWARDING ENGINE
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*