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參數(shù)資料
| 型號(hào)： | MB86965A |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP16 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁數(shù)： | 12/76頁 |
| 文件大?。?/td> | 394K |
| 代理商： | MB86965A |
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MB86965
2
twisted-pair cables and provides outputs for receive,
transmit, collision and link test LEDs. The twisted pair
receive threshold can be reduced to allow an extended
range between nodes in low-noise environments. Its wide
range of features makes EtherCoupler the ideal device for
10BASE-T twisted-pair Ethernet.
Possible configurations for the system bus interface
include I/O mapping, memory mapping and DMA
access, or a combination of these. With a 20 Mbyte/s
bandwidth, the EtherCoupler system bus interface allows
use of full throughput capacity of its packet-buffering
architecture. EtherCoupler bus modes are selectable,
thereby providing big or little endian byte-ordering,
permitting efficient data interface with most micro–
processors and higher-level protocols. The Fujitsu
high-speed, low-power CMOS process is used to
manufacture of the MB86965, which is furnished in a
160-pin plastic quad flat package.
FUNCTIONAL DESCRIPTION
As shown below in Figure 1, the MB86965 comprises
five major functional blocks: System Interface, Buffer
Controller, Control and Status Registers, Transmitter,
and receiver. EtherCoupler’s receive and transmit
sections fully implement the ISO/ANSI/IEEE 8802-3
CSMA/CD specification for 10-megabit per second
Ethernet. The transmitter assembles data packets for
transmission and the receiver disassembles received data
packets. On-chip Ethernet protocol functions include:
automatic generation and stripping of the 64-bit
preamble; generation and verification of 32-bit cyclic
redundancy check (CRC); collision resolution by binary
exponential backoff and retransmission; several modes of
address recognition, error detection and reporting; and
serial/parallel and parallel/serial conversions.
TYPICAL APPLICATION
Figure 2 is a block diagram illustrating the application of
the MB86965 in an add-in adapter card for an ISA
bus-based personal computer. The serial EEPROM
provides storage for I/O base address, boot PROM
address and interrupt channel as well as the Ethernet node
ID. One or two 8-bit bidirectional transceivers provide
data buffering between the Ethercoupler and the 8- or
16-bit system bus. A single SRAM, typically 8 or 32
kbytes, implements the local packet buffer, while an
optional boot PROM allows use of the adapter in diskless
environments, where the driver program must be loaded
from the network. The EtherCoupler provides interfaces
to 100- or 150-ohm twisted pair (10BASE-T) as well as
Figure 1. EtherCoupler Block Diagram
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB86965B | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:EtherCoupler ETHERNET CONTROLLER WITH 10BASE?T TRANSCEIVER |
| MB86965BPF-G-BND | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:EtherCoupler ETHERNET CONTROLLER WITH 10BASE?T TRANSCEIVER |
| MB86967 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:LAN Controller with PC Card, ISA Bus, and General-purpose Bus Interfaces |
| MB86967PFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:LAN Controller with PC Card, ISA Bus, and General-purpose Bus Interfaces |
| MB86977 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IP PACKET FORWARDING ENGINE |
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