![](http://datasheet.mmic.net.cn/30000/M30280M6-XXXHP_datasheet_2358793/M30280M6-XXXHP_152.png)
M16C/28 Group
Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
13. Timer S (Input Capture / Output Compare)
Rev.0.60 2004.02.01
page 134 of N
REJ09B0047-0060Z
The timer increments
a counter on all edges
The timer decrements
a counter on all edges
P80
P81
13.1 Base Timer
The base timer counts an internally generated count source with free-running.
Table 13.1.1 lists specifications of the base timer. Table 13.1.2 shows registers associated with the base
timer. Figure 13.1.1 shows a block diagram of the base timer. Figure 13.1.2 shows an example of the base
timer in counter increment mode. Figure 13.1.3 shows an example of the base timer in counter increment/
decrement mode. Figure 13.1.4 shows an example of two-phase pulse signal processing mode.
Table 13.1.1. Base Timer Specifications
Item
Specification
Count source(fBT1)
f1 or f2 divided by (n+1) ,
two pulse input divided by (n+1)
n: The DIV7 to DIV0 bits in the G1DV register determines.
n=0 to 255
In f1 and two pulse input when n=0, a count source is not divided
Counting operation
The base timer increments the counter
The base timer increments/decrements the counter (see the selectable function)
Two-phase pulse processing (see the selectable function)
Count start condition
The base timer starts counting when the BTS bit in the G1BCR1 register is set
to "1"
Count stop condition
The BTS bit in the G1BCR1 register is set to "0" (base timer reset)
Base timer reset condition
(1) Value of the base timer matches value of the G1BTRR register
(2) Value of the base timer matches value of G1PO0 register.
(3) Apply a low-level signal ("L") to external interrupt pin,INT1 pin
Value for base timer reset
"000016"
Interrupt request
The base timer interrupt request is asserten:
(1) At bit 14 or bit 15 is overflow of the base timer
(2) Base timer value matches the base timer reset register, and the base
timer reset is enable (See Figure 13.1.1.)
Read from timer
While the base timer is running,the G1BT register indicates a counter value
When the base timer is reset, a counter value is indeterminate
Write to timer
When a value is written while the base timer is running, the value written is
counted first. No value can be written while the base timer is reset.
Selectable function
Counter increment/decrement mode
The base timer starts counting in increment mode until reaching the
maximum count value. Then the base timer starts in decrement mode until
reaching next 000016. (See Figure 13.1.3.)
Two-phase pulse processing mode.
Two-phase pulses from P80 and P81 pins are counted (See Figure 13.1.4.)