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M16C/28 Group
Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
11. DMAC
Rev.0.60 2004.02.01
page 79 of N
REJ09B0047-0060Z
b7
b0
b7
b0
(b8)
(b15)
Function
Set the transfer count minus 1. The written value
is stored in the DMAi transfer counter reload
register, and when the DMAE bit of DMiCON
register is set to “1” (DMA enabled) or the DMAi
transfer counter underflows when the DMASL bit
of DMiCON register is “1” (repeat transfer), the
value of the DMAi transfer counter reload register
is transferred to the DMAi transfer counter.
When read, the DMAi transfer counter is read.
Symbol
Address
After reset
TCR0
002916, 002816
Indeterminate
TCR1
003916, 003816
Indeterminate
DMAi transfer counter (i = 0, 1)
Setting range
000016 to FFFF16
b7
(b23)
b3
b0
b7
b0
b7
b0
(b8)
(b16)(b15)
(b19)
Function
RW
Set the source address of transfer
Symbol
Address
After reset
SAR0
002216 to 002016
Indeterminate
SAR1
003216 to 003016
Indeterminate
DMAi source pointer (i = 0, 1) (Note)
Setting range
0000016 to FFFFF16
Nothing is assigned. When write, set “0”. When read, these contents
are “0”.
Symbol
Address
After reset
DAR0
002616 to 002416
Indeterminate
DAR1
003616 to 003416
Indeterminate
b3
b0
b7
b0
b7
b0
(b8)
(b15)
(b16)
(b19)
Function
Set the destination address of transfer
DMAi destination pointer (i = 0, 1)(Note)
Setting range
0000016 to FFFFF16
b7
(b23)
RW
Note: If the DSD bit of DMiCON register is “0” (fixed), this register can only be written to when the DMAE bit of
DMiCON register is “0” (DMA disabled).
If the DSD bit is “1” (forward direction), this register can be written to at any time.
If the DSD bit is “1” and the DMAE bit is “1” (DMA enabled), the DMAi forward address pointer can be read from
this register. Otherwise, the value written to it can be read.
Nothing is assigned. When write, set “0”. When read, these contents
are “0”.
Note: If the DAD bit of DMiCON register is “0” (fixed), this register can only be written to when the DMAE bit of
DMiCON register is “0”(DMA disabled).
If the DAD bit is “1” (forward direction), this register can be written to at any time.
If the DAD bit is “1” and the DMAE bit is “1” (DMA enabled), the DMAi forward address pointer can be read from
this register. Otherwise, the value written to it can be read.
Figure 11.4 SAR0, SAR1, DAR0, DAR1, TCR0, and TCR1 Registers